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Intersil - Low-Noise 24-bit Delta Sigma ADC

Numéro de référence ISL26102
Description Low-Noise 24-bit Delta Sigma ADC
Fabricant Intersil 
Logo Intersil 





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ISL26102 fiche technique
Low-Noise 24-bit Delta Sigma ADC
ISL26102, ISL26104
The ISL26102 and ISL26104 provide a low-noise
programmable gain amplifier along with a 24-bit Delta-Sigma
Analog-to-Digital Converter with two channel (ISL26102) or
four channel (ISL26104) differential, multiplexed inputs. The
devices feature exceptional noise performance for conversion
rates ranging from 2.5Sps to 4kSps.
The on-chip low-noise programmable-gain amplifier provides
gains ranging from 1 to 128, which supports ±19.5mVFS from
a 5V reference. The high input impedance allows direct
connection of sensors such as load cell bridges to ensure the
specified measurement accuracy without additional circuitry.
The Delta-Sigma ADC features a 3rd-order modulator providing
up to 21.5 bit noise-free performance (10Sps), with
user-selectable word rates. The converter can be operated
from an external clock source, an external crystal (typically
4.9152MHz), or the on-chip oscillator.
The ISL26102 and ISL26104 offer a simple-to-use serial
interface.
The ISL26102 and ISL26104 are available in a Thin Shrink
Small Outline Package (TSSOP). The devices are specified for
operation over the automotive temperature range (-40°C to
+105°C).
Features
• Programmable gain amplifier with gains of 1 to 128
• Low noise: 7nV/Hz @ PGA = 128
• Linearity error: 0.0002% FS
• Output word rates up to 4kSps
• Low-side switch for load cell power management
• +5V analog and +2.7V to +5V digital supplies
• ISL26102 in 24 Ld TSSOP
• ISL26104 in 28 Ld TSSOP
• ESD 7.5kV - HBM
Applications
• Weigh scales
• Temperature monitors and controls
• Load safety systems
• Industrial process control
• Pressure sensors
Related Literature
AN1704, “Precision Signal Path Data Acquisition System”
AVDD
ON-CHIP
TEMP
SENSOR
CAP
DVDD
DVDD
INTERNAL
CLOCK
EXTERNAL
OSCILLATOR
XTALIN/
CLOCK
XTALOUT
AIN1+
AIN1-
AIN2+
AIN2-
AIN3+
ISL26104 AIN3-
ONLY AIN4+
AIN4-
LSPS
INPUT
MULTIPLEXER
PGA
1, 2, 4, 8,16,
32, 64, 128
ΔΣ
ADC
CS
SDO/RDY
SDI
SCLK
PWDN
AGND
CAP DGND DGND VREF+ VREF- DGND DGND
FIGURE 1. BLOCK DIAGRAM
October 12, 2012
FN7608.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

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