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PDF ADE7913 Data sheet ( Hoja de datos )
| Número de pieza | ADE7913 | |
| Descripción | Sigma-Delta ADC | |
| Fabricantes | Analog Devices | |
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Data Sheet
FEATURES
Two (ADE7912) or three (ADE7913) 24-bit isolated, Σ-Δ
analog-to-digital converters (simultaneously sampling
ADCs)
Integrated isoPower, isolated dc-to-dc converter
On-chip temperature sensor
4-wire SPI serial interface
Up to 4 ADE7912/ADE7913 devices clocked from a single
crystal or an external clock
Synchronization of multiple ADE7912/ADE7913 devices
±31.25 mV peak input range for current channel
±500 mV peak input range for voltage channels
Reference drift: 10 ppm/°C typical
Single 3.3 V supply
20-lead, wide-body SOIC package with 8.3 mm creepage
Operating temperature: −40°C to +85°C
Safety and regulatory approvals (pending)
UL recognition
5000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
IEC 61010-1: 400 V rms
VDE certificate of conformity
DIN VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 846 V peak
APPLICATIONS
Shunt-based polyphase meters
Power quality monitoring
Solar inverters
Process monitoring
Protective devices
Isolated sensor interfaces
Industrial PLCs
GENERAL DESCRIPTION
The ADE7912/ADE79131 are isolated, 3-channel Σ-Δ ADCs for
polyphase energy metering applications using shunt current
sensors. Data and power isolation are based on the Analog Devices,
Inc., iCoupler® technology. The ADE7912 features two 24-bit
ADCs, and the ADE7913 features three ADCs. The current ADC
provides a 67 dB signal-to-noise ratio over a 3 kHz signal
bandwidth, whereas the voltage ADCs provide a SNR of 72 dB over
the same bandwidth. One channel is dedicated to measuring the
3-Channel, Isolated,
Sigma-Delta ADC with SPI
ADE7912/ADE7913
TYPICAL APPLICATIONS CIRCUIT
PHASE PHASE PHASE
NEUTRAL
A
B
C
ISOLATION
BARRIER
LOAD
EARTH
V1P
VM
IM PHASE A
ADE7912/
IP ADE7913
V2P
3.3V
GNDISO_A
GNDMCU
V1P
VM
IM PHASE B
ADE7912/
IP ADE7913
V2P
3.3V
GNDISO_B
GNDMCU
V1P
VM
IM PHASE C
ADE7912/
IP ADE7913
V2P
3.3V
GNDISO_C
GNDMCU
V1P
VM NEUTRAL
IM
LINE
ADE7912/
ADE7913
IP (OPTIONAL)
V2P
3.3V
GNDISO_N
GNDMCU
Figure 1.
3.3V
GNDMCU
voltage across a shunt when the shunt is used for current sensing.
Up to two additional channels are dedicated to measuring
voltages, which are usually sensed using resistor dividers. One
voltage channel can be used to measure the temperature of the die
via an internal sensor. The ADE7913 includes three channels:
one current and two voltage channels. The ADE7912 has one
voltage channel but is otherwise identical to the ADE7913.
1 Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,329; 6,262,600; 7,489,526; 7,558,080. Other patents are pending.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ADE7912/ADE7913
SPECIFICATIONS
VDD = 3.3 V ± 10%, GND = 0 V, on-chip reference, XTAL1 = 4.096 MHz, TMIN to TMAX = −40°C to +85°C, TA = 25°C (typical).
Table 1.
Parameter
ANALOG INPUTS1
Pseudo Differential Signal Voltage Range
Between IP and IM Pins
Pseudo Differential Signal Voltage Range
Between V1P and VM Pins and Between
V2P and VM Pins
Maximum VM and IM Voltage
Crosstalk
Min Typ Max
Unit
−31.25
−500
+31.25
+500
mV peak
mV peak
−25 +25
−90
−105
mV
dB
dB
Input Impedance to GNDISO (DC)
IP, IM, V1P, and V2P Pins
VM Pin
Current Channel ADC Offset Error
Voltage Channels ADC Offset Error
ADC Offset Drift over Temperature
Gain Error
Gain Drift over Temperature
AC Power Supply Rejection, PSR
480
240
−2
−35
−500
+500
−4 +4
−135
+135
−65 +65
−90
DC Power Supply Rejection, PSR
−80
TEMPERATURE SENSOR
Accuracy
WAVEFORM SAMPLING—CURRENT CHANNEL1
Signal-to-Noise Ratio, SNR
Signal-to-Noise-and-Distortion Ratio, SINAD
Total Harmonic Distortion, THD
Spurious-Free Dynamic Range, SFDR
VOLTAGE CHANNELS1
Signal-to-Noise Ratio, SNR
±5
67
68
72
74
66
68
72
73
−79
−78
−82
−82
83
83
85
85
72
74
77
79
kΩ
kΩ
mV
mV
ppm/°C
%
ppm/°C
ppm/°C
dB
dB
°C
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
Test Conditions/Comments
IM pin connected to GNDISO
Pseudo differential inputs between V1P and VM
pins and between V2P and VM pins; VM pin
connected to GNDISO
IP and IM inputs set to 0 V (GNDISO) when V1P and
V2P inputs at full scale
V2P and VM inputs set to 0 V (GNDISO) when IP
and V1P inputs at full scale; V1P and VM inputs
set to 0 V (GNDISO) when IP and V2P inputs at full
scale
V2 channel applies to the ADE7913 only
V1 channel only
Current channel
V1 and V2 channels
VDD = 3.3 V + 120 mV rms (50 Hz/100 Hz),
IP = V1P = V2P = GNDISO
VDD = 3.3 V ± 330 mV dc, IP = 6.25 mV rms, V1P =
V2P = 100 mV rms
ADC_FREQ = 8 kHz, BW = 3300 Hz
ADC_FREQ = 8 kHz, BW = 2000 Hz
ADC_FREQ = 2 kHz, BW = 825 Hz
ADC_FREQ = 2 kHz, BW = 500 Hz
ADC_FREQ = 8 kHz, BW = 3300 Hz
ADC_FREQ = 8 kHz, BW = 2000 Hz
ADC_FREQ = 2 kHz, BW = 825 Hz
ADC_FREQ = 2 kHz, BW = 500 Hz
ADC_FREQ = 8 kHz, BW = 3300 Hz
ADC_FREQ = 8 kHz, BW = 2000 Hz
ADC_FREQ = 2 kHz, BW = 825 Hz
ADC_FREQ = 2 kHz, BW = 500 Hz
ADC_FREQ = 8 kHz, BW = 3300 Hz
ADC_FREQ = 8 kHz, BW = 2000 Hz
ADC_FREQ = 2 kHz, BW = 825 Hz
ADC_FREQ = 2 kHz, BW = 500 Hz
ADC_FREQ = 8 kHz, BW = 3300 Hz
ADC_FREQ = 8 kHz, BW = 2000 Hz
ADC_FREQ = 2 kHz, BW = 825 Hz
ADC_FREQ = 2 kHz, BW = 500 Hz
Rev. 0 | Page 5 of 44
5 Page 
Data Sheet
ADE7912/ADE7913
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VDDISO
GNDISO
V2P
1
2
3
V1P 4
VM 5
IM 6
IP 7
LDO 8
REF 9
GNDISO 10
ADE7912/
ADE7913
TOP VIEW
(Not to Scale)
20 GND
19 VDD
18 CS
17 SCLK
16 MOSI
15 MISO
14 XTAL2
13 XTAL1
12 CLKOUT/DREADY
11 GND
Figure 7. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic
1 VDDISO
2, 10
GNDISO
3, 4, 5
V2P, V1P, VM
6, 7
8
9
11, 20
12
IM, IP
LDO
REF
GND
CLKOUT/DREADY
13 XTAL1
14 XTAL2
15 MISO
16 MOSI
17 SCLK
Description
Isolated Secondary Side Power Supply. This pin provides access to the 3.3 V on-chip isolated power
supply. Do not connect external load circuitry to this pin. Decouple this pin with a 10 µF capacitor in
parallel with a ceramic 100 nF capacitor using Pin 2, GNDISO.
Ground Reference of the Isolated Secondary Side. These pins provide the ground reference for the
analog circuitry. Use these quiet ground references for all analog circuitry. These two pins are
connected together internally.
Analog Inputs for the Voltage Channels. The voltage channels are used with the voltage
transducers. V2P and V1P are pseudo differential voltage inputs with a maximum signal level of
±500 mV with respect to VM for specified operation. Use these pins with the related input circuitry,
as shown in Figure 20. If V1P or V2P is not used, connect it to the VM pin. On the ADE7912, connect
the V2P pin to the VM pin because the V2P voltage channel is not available. The second voltage
channel is available on the ADE7913 only.
Analog Inputs for the Current Channel. The current channel is used with shunts. IM and IP are
pseudo differential voltage inputs with a maximum differential level of ±31.25 mV. Use these pins
with the related input circuitry, as shown in Figure 20.
2.5 V Output of Analog Low Dropout (LDO) Regulator. Decouple this pin with a 4.7 µF capacitor in
parallel with a ceramic 100 nF capacitor to GNDISO, Pin 10. Do not connect external load circuitry to
this pin.
Voltage Reference. This pin provides access to the on-chip voltage reference. The on-chip reference
has a nominal value of 1.2 V. Decouple this pin to GNDISO, Pin 10, with a 4.7 µF capacitor in parallel
with a ceramic 100 nF capacitor.
Primary Ground Reference.
Clock Output (CLKOUT). When CLKOUT functionality is selected (see the Synchronizing Multiple
ADE7912/ADE7913 Devices section for details), the ADE7912/ADE7913 generate a digital signal
synchronous to the master clock at the XTAL1 pin. Use CLKOUT to provide a clock to other
ADE7912/ADE7913 devices on the board.
Data Ready, Active Low (DREADY). When DREADY functionality is selected (see the Synchronizing
Multiple ADE7912/ADE7913 Devices section for details), the ADE7912/ADE7913 generate an active
low signal synchronous to the ADC output frequency. Use this signal to start reading the ADC
outputs of the ADE7912/ADE7913.
Master Clock Input. An external clock can be provided at this logic input. The CLKOUT/DREADY
signal of another appropriately configured ADE7912/ADE7913 (see the Synchronizing Multiple
ADE7912/ADE7913 Devices section for details) can be provided at this pin. Alternatively, a crystal
with a maximum drive level of 0.5 mW and an equivalent series resistance (ESR) of 20 Ω can be
connected across XTAL1 and XTAL2 to provide a clock source for the ADE7912/ADE7913. The clock
frequency for specified operation is 4.096 MHz, but lower frequencies down to 3.6 MHz can be used.
See the ADE7912/ADE7913 Clock section for more details.
Crystal, Second Input. A crystal with a maximum drive level of 0.5 mW and an ESR of 20 Ω can be
connected across XTAL2 and XTAL1 to provide a clock source for the ADE7912/ADE7913.
Data Output for SPI Port. Pull up this pin with a 10 kΩ resistor (see the ADE7912/ADE7913 Clock
section for details).
Data Input for SPI Port.
Serial Clock Input for SPI Port. All serial data transfers are synchronized to this clock (see the
Rev. 0 | Page 11 of 44
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADE7913.PDF ] | |
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