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Silicon Laboratories - 50V INPUT DC TO DC CONVERTER

Numéro de référence Si3500
Description 50V INPUT DC TO DC CONVERTER
Fabricant Silicon Laboratories 
Logo Silicon Laboratories 





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Si3500 fiche technique
Si3500
50 V INPUT DC TO DC CONVERTER
Features
Integrated switching regulator Supports non-isolated and
controller with on-chip power FET isolated switching topologies
Input range 42 to 57 V
Output can be set from 1.8 to
12 V
Output power up to 10 W
Highly-integrated IC enables
compact solution footprints
Comprehensive protection
circuitry
Transient overvoltage protection
Undervoltage lockout
Thermal shutdown protection
Short circuit protection
50% duty cycle limiting
Minimal external components Low-profile, 5x5 mm, 20-pin QFN
Integrated transient surge
RoHS-compliant
suppressor
Integrated dual current-limited
hotswap switch
Integrated switching power FET
Applications
3.3 V power supply generation Internet appliances
for Power over Ethernet Power Network devices
Sourcing supply, such as Si3452
Description
The Si3500 is a highly-integrated, high-voltage (42 to 57 V) input dc-to-dc
converter with integrated PWM control and power FET. The output can be
adjusted for various applications in the range of 1.8 to 12 VDC.
The integrated hot swap switch provides a 2-level current limit for slow
charging of the input filter capacitor followed by overcurrent protection at
400 mA.
The hot swap switch overcurrent protection fully protects the Si3500 from
short-circuit damage as long as the inductor does not saturate. For
situations where it is desirable to use a smaller inductor, it is possible to
reduce the overcurrent protection with the addition of one low-cost
transistor.
The Si3500 can be configured to provide an isolated output voltage or a
non-isolated output that is positive or negative with respect to the positive
input rail.
Input undervoltage and overvoltage lockout functions are fully-integrated.
A 65 V input clamp is also integrated. Output voltage softstart is enabled
by just one capacitor to control the output rise time at startup.
Ordering Information:
See Ordering Guide on page
page 14.
Pin Assignments
5 x 5 mm QFN
(Top View)
20 19 18 17 16 15
EROUT 1
SSFT 2
VDD 3
ISOSSFT 4
VNEG
(PAD)
14 NC
13 NC
12 VPOSF
11 NC
5 6 7 8 9 10
Rev. 1.2 1/15
Copyright © 2015 by Silicon Laboratories
Si3500

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