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S-75V00ANC fiches techniques PDF

Seiko - Single 2-Input NAND Gate

Numéro de référence S-75V00ANC
Description Single 2-Input NAND Gate
Fabricant Seiko 
Logo Seiko 





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S-75V00ANC fiche technique
S-75V00ANC
www.sii-ic.com
© Seiko Instruments Inc., 1999-2014
MINI LOGIC SERIES
2 INPUT NAND GATE
Rev.4.0_00
The S-75V00ANC is a single 2-Input NAND Gate fabricated by utilizing advanced silicon-gate CMOS technology which
provides the inherent benefit of CMOS low power consumption to achieve ultra high speed operation correspond to LSTTL
IC’s.
All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability.
Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin
and VCC.
This allows for interfaces between power supplies of different voltage, output level conversion from 5 V to 3 V and battery
backup applications.
Features
Wide power supply range:
Low current consumption:
Typical propagation delay:
High noise immunity:
Power down protection:
Lead-free
2 V to 5.5 V
1.0 μA max. (at 5.5 V, 25°C)
tPD = 3.7 ns (at 5 V)
VNIH = VNIL = 28% VCC min.
All pins
Applications
Personal computers, peripherals
Cellular phones
Cameras
Games
Package
SC-88A
Pin Configuration
Marking Specification
IN B 1
IN A 2
5 VCC
54
5V1
Product code
GND 3
4 OUT Y
(Top view)
Logic Diagram
IN B
IN A OUT Y
1 23
(Top view)
True values
A
L
L
H
H
B
L
H
L
H
Y
H
H
H
L
Seiko Instruments Inc.
1

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