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PDF STM8AF5168 Data sheet ( Hoja de datos )

Número de pieza STM8AF5168
Descripción Automotive 8-bit MCU
Fabricantes STMicroelectronics　
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STM8AF5168 Hoja de datos, Descripción, Manual

STM8AF5xxx STM8AF6x69/7x/8x/9x/Ax
Automotive 8-bit MCU, with up to 128 Kbytes Flash, data EEPROM,
10-bit ADC, timers, LIN, CAN, USART, SPI, I2C, 3 to 5.5 V
Datasheet − production data
Features
■ Core
– Max fCPU: 24 MHz
– Advanced STM8A core with Harvard
architecture and 3-stage pipeline
– Average 1.6 cycles/instruction resulting in
10 MIPS at 16 MHz fCPU for industry
standard benchmark
■ Memories
– Program memory: 32 to 128 Kbytes Flash
program; data retention 20 years at 55 °C
– Data memory: up to 2 Kbytes true data
EEPROM; endurance 300 kcycles
– RAM: 2 Kbytes to 6 Kbytes
■ Clock management
– Low-power crystal resonator oscillator with
external clock input
– Internal, user-trimmable 16 MHz RC and
low-power 128 kHz RC oscillators
– Clock security system with clock monitor
■ Reset and supply management
– Wait/auto-wakeup/Halt low-power modes
with user definable clock gating
– Low consumption power-on and power-
down reset
■ Interrupt management
– Nested interrupt controller with 32 vectors
– Up to 37 external interrupts on 5 vectors
■ Timers
– 2 general purpose 16-bit timers with up to 3
CAPCOM channels each (IC, OC, PWM)
– Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-
time insertion and flexible synchronization
– 8-bit AR basic timer with 8-bit prescaler
– Auto-wakeup timer
– Window and independent watchdog timers
■ I/Os
– Up to 68 user pins (11 high sink I/Os)
– Highly robust I/O design, immune against
current injection
LQFP80 14x14
LQFP64 10x10
LQFP48 7x7
LQFP32 7x7
VFQFPN32 5x5
■ Communication interfaces
– High speed 1 Mbit/s CAN 2.0B interface
– USART with clock output for synchronous
operation - LIN master mode
– LINUART LIN 2.1 compliant, master/slave
modes with automatic resynchronization
– SPI interface up to 10 Mbit/s or fMASTER/2
– I2C interface up to 400 Kbit/s
■ Analog to digital converter (ADC)
– 10-bit resolution, 2 LSB TUE, 1 LSB
linearity and up to 16 multiplexed channels
■ Operating temperature up to 150 °C
■ Qualification conforms to AEC-Q100 rev G
Table 1. Device summary(1)
Part numbers: STM8AF52xx (with CAN)
STM8AF52AA, STM8AF52A9, STM8AF52A8, STM8AF528A,
STM8AF5289, STM8AF5288, STM8AF5269, STM8AF5268
Part numbers: STM8AF6269/8x/Ax
STM8AF62AA, STM8AF62A9, STM8AF62A8, STM8AF628A,
STM8AF6289, STM8AF6288, STM8AF6286, STM8AF6269,
STM8AF62A6,
Part numbers: STM8AF51xx (with CAN)(2)
STM8AF51AA, STM8AF51A9, STM8AF51A8, STM8AF519A,
STM8AF5199, STM8AF5198, STM8AF518A, STM8AF5189,
STM8AF5188, STM8AF5179, STM8AF5178, STM8AF5169,
STM8AF5168
Part numbers: STM8AF6169/7x/8x/9x/Ax(2)
STM8AF61AA, STM8AF61A9, STM8AF61A8, STM8AF619A,
STM8AF6199, STM8AF6198, STM8AF618A, STM8AF6189,
STM8AF6188, STM8AF6186, STM8AF6179, STM8AF6178,
STM8AF6176, STM8AF6169
1. In the order code, ‘F’ applies to devices with Flash program
memory and data EEPROM while ‘H’ refers to devices with
Flash program memory only. ‘F’ is replaced by ‘P’ for devices
with FASTROM (see Tables 2, 3, 4, and 5, and Figure 52).
2. Not recommended for new design.
July 2012
This is information on a product in full production.
Doc ID 14395 Rev 9
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www.st.com
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STM8AF5168 pdf
STM8AF52/62xx, STM8AF51/61xx
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Table 33.
Table 34.
Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
Table 41.
Table 42.
Table 43.
Table 44.
Table 45.
Table 46.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
STM8AF52xx product line-up with CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STM8AF62xx product line-up without CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STM8AF/H/P51xx product line-up with CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
STM8AF/H/P61xx product line-up without CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Peripheral clock gating bits (CLK_PCKENR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Peripheral clock gating bits (CLK_PCKENR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Advanced control and general purpose timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
TIM4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ADC naming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Communication peripheral naming correspondence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Legend/abbreviation for the pin description table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
STM8A microcontroller family pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Memory model 128K. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
I/O port hardware register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
General hardware register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
CPU/SWIM/debug module/interrupt controller registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Temporary memory unprotection registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
STM8A interrupt table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Option byte description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Operating lifetime . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Operating conditions at power-up/power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Total current consumption in Run, Wait and Slow mode. General conditions
for VDD apply, TA = -40 °C to 150 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Total current consumption in Halt and Active-halt modes. General conditions for VDD
applied. TA = -40 °C to 55 °C unless otherwise stated . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Oscillator current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Programming current consumption. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Typical peripheral current consumption VDD = 5.0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
HSE external clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Flash program memory/data EEPROM memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Flash program memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Data memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
TIM 1, 2, 3, and 4 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
I2C characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
ADC accuracy for VDDA = 5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Doc ID 14395 Rev 9
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5 Page





STM8AF5168 arduino
STM8AF52/62xx, STM8AF51/61xx
3 Product line-up
Product line-up
..
Table 2. STM8AF52xx product line-up with CAN
Order code
Package
High
density
Flash
program
memory
(bytes)
RAM
(bytes)
Data
EEPROM
(bytes)
10-bit
A/D
chan.
Timers
(IC/OC/PWM)
Serial
interfaces
I/0
wakeup
pins
STM8AF/P52AA LQFP80 128 K
STM8AF/P528A
STM8AF/P52A9
(14x14)
64 K
128 K
2K
STM8AF/P5289
LQFP64
(10x10)
64 K
6K
STM8AF/P5269
32 K
1K
STM8AF/P52A8
STM8AF/P5288
STM8AF/P5268
LQFP48
(7x7)
128 K
64 K
32 K
2K
1K
68/37
16
1x8-bit: TIM4
3x16-bit: TIM1,
TIM2, TIM3
(9/9/9)
CAN,
LIN(UART)
, SPI,
USART,
I²C
52/36
10 38/35
Table 3. STM8AF62xx product line-up without CAN
Order code
Package
High
density
Flash
program
memory
(bytes)
RAM
(bytes)
Data
EEPROM
(bytes)
10-bit
A/D
chan.
Timers
(IC/OC/PWM)
Serial
interfaces
I/0
wakeup
pins
STM8AF/P62AA LQFP80
STM8AF/P628A (14x14)
128 K
64 K
2K
68/37
STM8AF/P62A9
STM8AF/P6289
STM8AF/P6269
LQFP64
(10x10)
STM8AF/P62A8
STM8AF/P6288
LQFP48
(7x7)
STM8AF/P6286
LQFP32
(7x7)
STM8AF/P62A6
VFQFPN32
(5x5)
128 K
64 K
32 K
128 K
64 K
128 K
6K
2K
1K
2K
16
1x8-bit: TIM4
3x16-bit: TIM1,
TIM2, TIM3
(9/9/9)
LIN(UART),
SPI,
USART, I²C
52/36
10 38/35
1x8-bit: TIM4
7
3x16-bit: TIM1, LIN(UART),
TIM2, TIM3 SPI, I²C
25/23
(8/8/8)
Doc ID 14395 Rev 9
11/110

11 Page







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