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PDF NTD4858N Data sheet ( Hoja de datos )
| Número de pieza | NTD4858N | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NTD4858N
Power MOSFET
25 V, 73 A, Single N−Channel, DPAK/IPAK
Features
• Trench Technology
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Devices
Applications
• VCORE Applications
• DC−DC Converters
• High/Low Side Switching
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
TA = 85°C
VDSS
VGS
ID
25
±20
14
10.9
V
V
A
Power Dissipation
RqJA (Note 1)
Continuous Drain
Current RqJA
(Note 2)
Power Dissipation
RqJA (Note 2)
Continuous Drain
Current RqJC
(Note 1)
TA = 25°C
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
PD
ID
PD
ID
2.0 W
11.2 A
8.7
1.3 W
73 A
56
Power Dissipation
RqJC (Note 1)
Pulsed Drain
Current
TC = 25°C
tp=10ms TA = 25°C
PD
IDM
54.5 W
146 A
Current Limited by Package
TA = 25°C
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL = 15 Apk, L = 1.0 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IDmaxPkg
TJ,
TSTG
IS
dV/dt
EAS
TL
45
−55 to
+175
45
6
112.5
260
A
°C
A
V/ns
mJ
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2014
June, 2014 − Rev. 3
1
http://onsemi.com
V(BR)DSS
25 V
RDS(ON) MAX
6.2 mW @ 10 V
9.3 mW @ 4.5 V
D
ID MAX
73 A
N−CHANNEL MOSFET
G
S
4
4
4
12
3
DPAK
CASE 369AA
(Bent Lead)
STYLE 2
1 23
1
2
3
IPAK
IPAK
CASE 369AD CASE 369D
(Straight Lead) (Straight Lead
STYLE 2 DPAK) STYLE 2
4
Drain
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
2
1 Drain 3
Gate Source
1 23
Gate Drain Source
1
23
Gate Drain Source
A = Assembly Location*
Y = Year
WW = Work Week
4858N = Device Code
G = Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
NTD4858N/D
1 page  
NTD4858N
TYPICAL PERFORMANCE CURVES
2000
1800
1600
Ciss
VGS = 0 V
TJ = 25°C
1400
1200
1000
800 Coss
600
400
200 Crss
0
0 2.5 5 7.5 10 12.5 15 17.5
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
20
Figure 7. Capacitance Variation
1000
VDD = 15 V
ID = 30 A
VGS = 11.5 V
100
10
td(off)
tf
tr
td(on)
1
1
1000
10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
100
100
10 ms
10
VGS = 20 V
SINGLE PULSE
1 TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
0.1
0.1
PACKAGE LIMIT
1
10
100 ms
1 ms
10 ms
dc
100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
10
QT
8
6
4 Q1
Q2
VGS
2 ID = 30 A
VDD = 15 V
0 TJ = 25°C
0 4 8 12 16 20 24 28
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
30
VGS = 0 V
25 TJ = 25°C
20
15
10
5
0
0.5 0.6
0.7 0.8 0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
120
ID = 15 A
100
80
60
40
20
0
25 50
75
100
125 150
175
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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| PDF Descargar | [ Datasheet NTD4858N.PDF ] | |
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