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PDF MC92314 Data sheet ( Hoja de datos )
| Número de pieza | MC92314 | |
| Descripción | DVB-T Single Chip Demodulator Application Note | |
| Fabricantes | Freescale Semiconductor | |
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Freescale Semiconductor, Inc.
MC92314
DVB-T Single Chip Demodulator
Application Note
Authors
Christoph Patzelt (Freescale),
Adrian Turner (NDS)
(Single Chip DVB-T Demodulator)
Rev. 1.3
Date: November 30, 1998 3:37 pm
© Freescale Semiconductor, Inc., 2004. All rights reserved.
© MOTOROLA, INC. 1997 All Rights Reserved
For More Information On This Product,
Go to: www.freescale.com
1 page  
Freescale Semiconductor, Inc.
Table of Contents
4.3.4 Tuner Control signals from the MC92314 ...................................................4-27
4.3.4.1 VCXO Control Loop..........................................................................4-28
4.3.4.2 AGC Control Loop ............................................................................4-28
4.4 MPEG-2 Output Interface of the MC92314.......................................................4-28
4.5 References .......................................................................................................4-29
Section 5
USAGE AND PERFORMANCE OF MOTOROLA’S SINGLE-CHIP DVB-T DEVICE
5.1 Remarks on the Circuit Diagram.........................................................................5-1
5.2 Initialising the Chipset.........................................................................................5-1
5.2.1 Setup of the OFDM Block..............................................................................5-2
5.2.1.1 Registers of the OFDM Block .............................................................5-2
5.3 Monitoring the DVB-T Single Chip......................................................................5-2
5.3.1 Status Information of the OFDM Block..........................................................5-2
5.3.1.1 Hardware pins ....................................................................................5-2
5.3.1.2 Lock Status Registers.........................................................................5-2
5.3.1.3 Usage of the AGC Feedback Register ...............................................5-3
5.3.2 Status Information of the FEC Block .............................................................5-3
5.3.2.1 Hardware Pins ....................................................................................5-3
5.3.2.2 Software Registers .............................................................................5-3
5.3.2.3 FEC Block QVAL Values corresponding to BER values ....................5-3
5.4 Performance Considerations ..............................................................................5-4
5.4.1 Possible Changes in the OFDM Block ..........................................................5-4
5.4.1.1 Speeding up the Acquisition Time ......................................................5-4
5.4.1.2 Co-Channel Protection vs. Noise .......................................................5-6
5.4.2 Possible Changes in the FEC Block..............................................................5-6
5.4.2.1 Fixing the Coderate for the Viterbi Decoder .......................................5-6
5.4.2.2 Adjusting the MPEG Frame Synchroniser..........................................5-6
5.5 MC92314 Performance.......................................................................................5-7
5.5.1 Performance in a typical Consumer Application............................................5-7
5.5.1.1 Typical Lock Performance ..................................................................5-7
5.5.1.2 Noise and Interference Performance..................................................5-9
5.6 References .......................................................................................................5-10
Single Chip DVB-T Demodulator - Rev. 1.3 (11/30/98)
For More Information On This Product,
Go to: www.freescale.com
5 Page 
Freescale Semiconductor, Inc...
MPEG-2 TS
Sync-Inversion
Scrambling
FEC-Encod.
and Interl.
Inner
Interleaving
P(x)=1+x14+x15
RS (204,188) of GF (256)
Interleaving depth I=12;
Cell memory M=17 byte
Convolutional Encoding
(G1=171, G2=133),
Mothercoderate 1/2,
Possible Coderates
2/3, 3/4, 5/6, 7/8
Bit-Interleaving
with Block size
72 Bits
Symbol
(Frequency)-
Interleaving
Mapper
and
Modulator
QPSK,
16-QAM or
64-QAM,
Gray mapping
Non-uniform
Modulation
possible
Frame-Adapt.
OFDM-Mod.
Guard-Int.
Pilot insertion
2 K IFFT
Different
guard interval
lengths possible
Upconversion
Amplification
UHF Range
470-862 MHz
Terrestrial
Channel
Sync-Inversion
Descrambling
FEC-Decod.
Deinterleaving
Inner De-
interleaving
Demapping
Synchron.
OFDM
Demodulation
Downconver-
sion I,Q-
Demodulation
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MC92314.PDF ] | |
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