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PDF AOZ1033AI Data sheet ( Hoja de datos )

Número de pieza AOZ1033AI
Descripción 3A Synchronous Buck Regulator
Fabricantes Alpha & Omega Semiconductors 
Logotipo Alpha & Omega Semiconductors Logotipo



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AOZ1033AI
EZBuck™ 3A Synchronous Buck Regulator
General Description
The AOZ1033A is a high efficiency, easy to use, 3A
synchronous buck regulator. The AOZ1033A works from
4.5V to 18V input voltage range, and provides up to 3A of
continuous output current with an output voltage adjust-
able down to 0.8V.
The AOZ1033A comes in a SO-8 package and is rated
over a -40°C to +85°C operating ambient temperature
range.
Features
z 4.5V to 18V operating input voltage range
z Synchronous Buck: 80mΩ internal high-side switch
and 30mΩ internal low-side switch with integrated
schottky diode
z High efficiency: up to 95%
z Internal soft start
z Output voltage adjustable to 0.8V
z 3A continuous output current
z Fixed 600kHz PWM operation
z Pulse skipping at light load for high efficiency over
entire load range
z Cycle-by-cycle current limit
z Pre-bias start-up
z Short-circuit protection
z Thermal shutdown
z SO-8 package
Applications
z Point of load DC/DC converters
z LCD TV
z Set top boxes
z DVD/Blu-ray players/recorders
z Cable modems
z PCIe graphics cards
z Telecom/Networking/Datacom equipment
Typical Application
VIN
C1
22µF
RC
CC
VIN
EN
AOZ1033 LX
COMP
FB
AGND
PGND
L1 4.7µH
R1
R2
VOUT
C2, C3
22µF
Rev. 1.1 October 2010
Figure 1. 3.3V 3A Synchronous Buck Regulator
www.aosmd.com
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AOZ1033AI pdf
AOZ1033AI
Typical Performance Characteristics
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Light Load (DCM) Operation
Full Load (CCM) Operation
1us/div
Start Up to Full Load
1us/div
Short Circuit Protection
1ms/div
50% to 100% Load Transient
4ms/div
Short Circuit Recovery
100us/div
Rev. 1.1 October 2010
10ms/div
www.aosmd.com
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AOZ1033AI arduino
AOZ1033AI
Equation above can also be simplified to:
CC
=
C-----O-----×-----R-----L-
RC
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ1033A buck regulator circuit, high pulsing cur-
rent flows through two circuit loops. The first loop starts
from the input capacitors, to the VIN pin, to the LX pins,
to the filter inductor, to the output capacitor and load, and
then return to the input capacitor through ground. Current
flows in the first loop when the high side switch is on. The
second loop starts from inductor, to the output capacitors
and load, to the low side NMOSFET. Current flows in the
second loop when the low side NMOSFET is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input capaci-
tor, output capacitor, and PGND pin of the AOZ1033A.
In the AOZ1033A buck regulator circuit, the major power
dissipating components are the AOZ1033A and the out-
put inductor. The total power dissipation of converter cir-
cuit can be measured by input power minus output
power.
Ptotal_loss = VIN × IIN VO × IO
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
Pinductor_loss = IO2 × Rinductor × 1.1
Please see the thermal de-rating curves for maximum
load current of the AOZ1033A under different ambient
temperature.
The thermal performance of the AOZ1033A is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental condi-
tions.
The AOZ1033A is standard SO-8 package. Several lay-
out tips are listed below for the best electric and thermal
performance. Figure 3 on the next page illustrates a PCB
layout example of AOZ1033A.
1. The LX pins are connected to internal PFET and
NFET drains. They are low resistance thermal con-
duction path and most noisy switching node. Con-
nected a large copper plane to LX pin to help thermal
dissipation.
2. Do not use thermal relief connection to the VIN and
the PGND pin. Pour a maximized copper area to the
PGND pin and the VIN pin to help thermal dissipa-
tion.
3. Input capacitor should be connected to the VIN pin
and the PGND pin as close as possible.
4. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect them
only at one point to avoid the PGND pin noise cou-
pling to the AGND pin.
5. Make the current trace from LX pins to L to Co to the
PGND as short as possible.
6. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
7. Keep sensitive signal trace far away form the LX
pins.
The actual junction temperature can be calculated with
power dissipation in the AOZ1033A and thermal imped-
ance from junction to ambient.
Tjunction = (Ptotal_lossPinductor_loss) × ΘJA
The maximum junction temperature of AOZ1033A is
150°C, which limits the maximum load current capability.
Rev. 1.1 October 2010
www.aosmd.com
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