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PDF PFW20N50 Data sheet ( Hoja de datos )

Número de pieza PFW20N50
Descripción 500V N-Channel MOSFET
Fabricantes Power Device 
Logotipo Power Device Logotipo



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No Preview Available ! PFW20N50 Hoja de datos, Descripción, Manual

Aug 2006
FEATURES
‰ Originative New Design
‰ 100% EAS Test
‰ Rugged Gate Oxide Technology
‰ Extremely Low Intrinsic Capacitances
‰ Remarkable Switching Characteristics
‰ Unequalled Gate Charge : 90 nC (Typ.)
‰ Extended Safe Operating Area
‰ Lower RDS(ON) : 0.20 Ω (Typ.) @VGS=10V
APPLICATION
‰ High current, High speed switching
‰ Suitable for power supplies, adaptors and PFC
‰ SMPS (Switched Mode Power Supplies)
PFW20N50
500V N-Channel MOSFET
BVDSS = 500 V
RDS(on) = 0.25 Ω
ID = 20 A
TO-247
Drain {
Gate
{
◀▲
Source
{
TO-3P
1
2
3
1.Gate 2. Drain 3. Source
1
2
3
1.Gate 2. Drain 3. Source
Absolute Maximum Ratings TC=25unless otherwise specified
Symbol
Parameter
Value
VDSS
ID
IDM
VGS
EAS
IAR
EAR
dv/dt
Drain-Source Voltage
Drain Current
Drain Current
– Continuous (TC = 25℃)
– Continuous (TC = 100℃)
Drain Current
– Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
500
20
13
80
±30
1000
20
25
4.0
PD
TJ, TSTG
TL
Power Dissipation (TC = 25℃)
- Derate above 25℃
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
250
2.0
-55 to +150
300
Thermal Resistance Characteristics
Symbol
RθJC
RθCS
RθJA
Junction-to-Case
Parameter
Case-to-Sink
Junction-to-Ambient
Typ.
--
0.24
--
Max.
0.5
--
40
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/
Units
℃/W
Aug 2006
Power Device REV.A0

1 page




PFW20N50 pdf
Characteristics Test Circuit & Waveform
10V
VDS
RG
RL
VDD
( 0.5 rated VDS )
VDS
90%
DUT
Vin 10%
td(on)
tr
t on
Fig 14. Resistive Switching Test Circuit & Waveforms
td(off)
tf
t off
Same Type
50KΩ
as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Fig 15. Gate Charge Test Circuit & Waveform
10V
VDS
ID
RG
L
VDD
DUT
EAS = --21--
LL IAS2
------B--V--D--S-S-------
BVDSS -- VDD
BVDSS
IAS
ID (t)
VDD
VDS (t)
t p Time
Fig 16. Unclamped Inductive Switching Test Circuit & Waveforms
Aug 2006
Power Device REV.A0

5 Page










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