FDBL0065N40 Datasheet PDF - Fairchild Semiconductor
| Part Number | FDBL0065N40 | |
| Description | N-Channel PowerTrench MOSFET | |
| Manufacturers | Fairchild Semiconductor | |
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FDBL0065N40
N-Channel PowerTrench® MOSFET
40 V, 300 A, 0.65 mΩ
November 2014
Features
Typical RDS(on) = 0.5 mΩ at VGS = 10V, ID = 80 A
Typical Qg(tot) = 220 nC at VGS = 10V, ID = 80 A
UIS Capability
RoHS Compliant
Applications
Industrial Motor Drive
Industrial Power Supply
Industrial Automation
Battery Operated tools
Battery Protection
Solar Inverters
UPS and Energy Inverters
Energy Storage
Load Switch
D
G
S
For current package drawing, please refer to the Fairchild web‐
site at https://www.fairchildsemi.com/evaluate/package‐spec‐
ifications/packageDetails.html?id=PN_PSOFA‐008
MOSFET Maximum Ratings TJ = 25°C unless otherwise noted.
Symbol
Parameter
VDSS
VGS
ID
Drain-to-Source Voltage
Gate-to-Source Voltage
Drain Current - Continuous (VGS=10) (Note 1)
Pulsed Drain Current
EAS Single Pulse Avalanche Energy
PD
Power Dissipation
Derate Above 25oC
TJ, TSTG
RθJC
RθJA
Operating and Storage Temperature
Thermal Resistance, Junction to Case
Maximum Thermal Resistance, Junction to Ambient
TC = 25°C
TC = 25°C
(Note 2)
(Note 3)
Ratings
40
±20
300
See Figure 4
1064
429
2.86
-55 to + 175
0.35
43
Units
V
V
A
mJ
W
W/oC
oC
oC/W
oC/W
Notes:
1: Current is limited by bondwire configuration.
2: Starting TJ = 25°C, L = 0.3mH, IAS = 84A, VDD = 40V during inductor charging and VDD = 0V during time in avalanche.
3: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface
presented here is
of the
based
drain pins. RθJC is
on mounting on a 1
guaranteed by design,
in2 pad of 2oz copper.
while
RθJAis
determined
by
the
board
design.
The maximum rating
Package Marking and Ordering Information
Device Marking
FDBL0065N40
Device
FDBL0065N40
Package
MO-299A
-
-
-
©2014 Fairchild Semiconductor Corporation
FDBL0065N40 Rev.C3
1
www.fairchildsemi.com
|
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Typical Characteristics
5
ID = 80A
4
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
3
TJ = 175oC
2
TJ = 25oC
1
0
2468
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDSON vs. Gate Voltage
10
2.0
PULSE DURATION = 80μs
1.8 DUTY CYCLE = 0.5% MAX
1.6
1.4
1.2
1.0
0.8
0.6
0.4
-80
ID = 80A
VGS = 10V
-40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
Figure 12. Normalized RDSON vs. Junction
Temperature
1.5
VGS = VDS
ID = 250μA
1.2
0.9
0.6
0.3
0.0
-80
-40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
Figure 13. Normalized Gate Threshold Voltage vs.
Temperature
1.10
ID = 1mA
1.05
1.00
0.95
0.90
-80
-40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
100000
10000
Ciss
Coss
1000
Crss
f = 1MHz
VGS = 0V
100
0.1 1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 15. Capacitance vs. Drain to Source
Voltage
10
ID = 80A
8
6
VDD =16V
VDD = 20V
VDD = 24V
4
2
0
0 20 40 60 80 100 120 140 160 180 200 220
Qg, GATE CHARGE(nC)
Figure 16. Gate Charge vs. Gate to Source
Voltage
FDBL0065N40 Rev.C3 5 www.fairchildsemi.com
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