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PDF ATS685LSH Data sheet ( Hoja de datos )
| Número de pieza | ATS685LSH | |
| Descripción | Differential Gear Tooth Sensor IC | |
| Fabricantes | Allegro MicroSystems | |
| Logotipo |  |
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ATS685LSH
Two-Wire, Zero Speed
Differential Gear Tooth Sensor IC
Features and Benefits
• Fully optimized differential digital gear tooth sensor IC
• Running Mode Lockout
• Unique algorithms for increased vibration immunity
• AGC and reference adjust circuit
• Air gap independent switchpoints
• Digital output representing gear profile
• Precise duty cycle throughout operating temperature range
• Large operating air gap range
• Short power-on time
• True zero-speed operation
• Undervoltage lockout (UVLO)
• Wide operating voltage range
• Internal current regulator for two-wire operation
• Single-chip sensing IC for high reliability
• Robust test coverage capability using Scan Path
and IDDQ measurement
Package: 4-pin SIP (suffix SH)
Not to scale
Description
TheATS685LSH is an optimized Hall-effect sensing integrated
circuit and rare-earth pellet combination that provides a
user-friendly solution for true zero-speed digital gear-tooth
sensing in two-wire applications. The sensor IC consists of a
single-shot molded plastic package that includes a samarium
cobalt pellet, a pole piece, and a Hall Effect IC that has been
optimized to the magnetic circuit. This small package can be
easily assembled and used in conjunction with a wide variety
of gear shapes and sizes.
The single integrated circuit incorporates a dual element
Hall-effect sensor IC and signal processing circuitry that
switches in response to differential magnetic signals created
by ferromagnetic targets. The device contains a sophisticated
compensating circuit to eliminate magnetic and system offsets.
Digital tracking of the analog signal is used to achieve true
zero speed operation. Advanced calibration algorithms are
used to adjust the device gain and offset at power-up, resulting
in air gap independent switchpoints, which greatly improves
output accuracy. In addition, advanced algorithms mitigate the
effect of system anomalies such as target vibration and sudden
changes in air gap.
The regulated current output is configured for two-wire
operation. This sensor IC is ideal for obtaining edge and duty
cycle information in gear-tooth–based applications such as
transmission speed.
The ATS685 is provided in a 4-pin SIP package that is lead
(Pb) free, with 100% matte tin leadframe plating.
Functional Block Diagram
VCC
Voltage
Regulator
Hall
Amp
Offset
Adjust
AGC
PDAC
NDAC
Reference
Generator
and
Lockout
ATS685LSH-DS
Synchronous Digital Controller
GND
Multiplexor
TEST
1 page  
ATS685LSH
Two-Wire, Zero Speed
Differential Gear Tooth Sensor IC
Reference Target 60-0 (60 Tooth Target)
Characteristics
Symbol
Test Conditions
Outside Diameter
Face Width
Angular Tooth Thickness
Angular Valley Thickness
Tooth Whole Depth
Material
Do Outside diameter of target
F
Breadth of tooth, with respect
to branded face
t
Length of tooth, with respect
to branded face
tv
Length of valley, with respect
to branded face
ht
Low Carbon Steel
Typ.
120
6
3
3
3
–
Units
mm
mm
deg.
deg.
mm
–
Symbol Key
Branded Face ØDO
of Package
ht
F
Air Gap
Reference Gear Magnetic Gradient Amplitude versus Air Gap
Reference Target 60-0, Hall element spacing 2.20 mm
1200
1000
800
600
400
200
0
0 123
Air Gap (mm)
Branded Face
of Package
Reference Target
60-0
600
400
200
0
200
400
600
0
Reference Gear Magnetic Profile
Reference Target 60-0, Hall element spacing 2.20 mm
3.00 mm AG
Air Gap (mm)
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
3.00
0.50 mm AG
2 4 6 8 10 12 14 16 18 20
Gear Rotation (°)
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
5 Page 
ATS685LSH
Two-Wire, Zero Speed
Differential Gear Tooth Sensor IC
Start Mode Hysteresis
This feature helps to ensure optimal self-calibration by rejecting
electrical noise and low-amplitude target vibration during initial-
ization. This prevents AGC from calibrating the device on such
spurious signals. Calibration can be performed using the actual
target features.
A typical scenario is shown in figure 7. The hysteresis, POHYS,
is a minimum level of the peak-to-peak amplitude of the internal
analog electrical signal, VPROC , that must be exceeded before the
ATS685 starts to compute switchpoints.
Target, Gear
Target Magnetic Profile
IC Position
Relative to Target
1
2 34
Differential Signal, VPROC
BOP(initial)
Start Mode
Hysteresis, POHYS
Output Signal, ICC
If exceed POHYS
on high side
If exceed POHYS
on low side
BRP(initial)
BRP
BOP
BRP
Figure 7. Operation of Start Mode Hysteresis
• At power-on (position 1), the ATS685 begins sampling VPROC.
• At the point where the Start Mode Hysteresis, POHYS, is exceeded, the device establishes an initial switching threshold, by
using the Continuous Update algorithm. If VPROC is rising through the limit on the high side (position 2), the switchpoint is
BOP , and if VPROC is falling through the limit on the low side (position 4), it is BRP . After this point, Start Mode Hysteresis is
no longer a consideration. Note that a valid VPROC value exceeding the Start Mode Hysteresis can be generated either by a
legitimate target feature or by excessive vibration.
• In either case (BOP or BRP), because the switchpoint is immediately passed as soon as it is established, the ATS685 en-
ables switching:
▫ If on the high side, at BOP (position 2) the output would switch from low to high. However, because output is already high,
no output switching occurs.
At the next switchpoint, where BRP is passed (position 3), the output switches from high to low.
▫ If on the low side, at BRP (position 4) the output switches from high to low.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
11 Page | ||
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| PDF Descargar | [ Datasheet ATS685LSH.PDF ] | |
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