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PDF BTF3050TEATMA1 Data sheet ( Hoja de datos )

Número de pieza BTF3050TEATMA1
Descripción HITFET Smart Low-Side Power Switch
Fabricantes Infineon 
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No Preview Available ! BTF3050TEATMA1 Hoja de datos, Descripción, Manual

HITFETTM +
BTF3050TE
Smart Low-Side Power Switch
Single channel, 50 mΩ
Datasheet
Rev. 1.0, 2014-07-21
Automotive Power

1 page




BTF3050TEATMA1 pdf
HITFET - BTF3050TE
Smart Low-Side Power Switch
Overview
Diagnostic Functions
• Short circuit to battery
• Over temperature
• Stable latching diagnostic signal
Protection Functions
• Over temperature shutdown with auto-restart
• Active clamp over voltage protection of the output
• Current limitation
• Enhanced short circuit protection
Detailed Description
The device is able to switch all kind of resistive, inductive and capacitive loads, limited by clamping energy (EAS)
and maximum current capabilities.
The BTF3050TE offers dedicated ESD protection on the IN, VDD and SRP pins which refers to the Ground pin,
as well as an over voltage clamping of the output to Source/GND.
The over voltage protection gets activated during inductive turn off conditions or other over voltage events (e.g.
load dump). The power MOSFET is limiting the drain-source voltage, if it rises above the VOUT(CLAMP).
The over temperature protection prevents the device from overheating due to overload and/or bad cooling
conditions.
The BTF3050TE has a thermal-restart function. The device will turn on again, if input is still high, after the
measured temperature has dropped below the thermal hysteresis.
Datasheet
5 Rev. 1.0, 2014-07-21

5 Page





BTF3050TEATMA1 arduino
HITFET - BTF3050TE
Smart Low-Side Power Switch
General Product Characteristics
JEDEC 1s0p / 600 mm²
Figure 6 PCB layout
JEDEC 1s0p / Footprint
JEDEC 2s2p
4.3.2
Transient Thermal Impedance
Detail: Solder area
30
25
20
15
10
5
Figure 7
0
0,00001 0,0001
0,001
0,01
0,1
1
10
100
1000
10000
tp. [s]
Typical transient thermal impedance ZthJA = f(tp), Ta = 85 °C
Value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The
product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper
layers (2 x 70 mm Cu, 2 x 35 mm Cu). Where applicable a thermal via array under the ex posed
pad contacted the first inner copper layer. Device is dissipating 1 W power.
Datasheet
11 Rev. 1.0, 2014-07-21

11 Page







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