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Número de pieza IPS101C-SO
Descripción Power Factor Correction Controller
Fabricantes ASIC Advantage 
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IN-PLUG® IPS101 Datasheet Rev.10 - High Efficiency Power Factor Correction Controller
IN-PLUG® series: IPS101
Low Cost, High Efficiency
Power Factor Correction Controller
INTRODUCTION
– REVISION 10 -
DESCRIPTION
The IN-PLUG® IPS101 is a special line-side
switching controller which provides simple yet high
performance active power factor correction. The
IPS101 was optimized for electronic ballast compact
SMPSs up to 300W that requires a minimum board
area, reduced component count and high efficiency.
The PFC forces the SMPS to draw a current
proportional to the instant AC line voltage in order to
charge a storage capacitor thus resulting in excellent
power factor and low line harmonics generation.
The output of the PFC is a regulated voltage which
slightly exceeds the peak line voltage and is generally
too high to be used as is. This is why a PFC is usually
followed by a DC/DC converter, providing one or
more isolated output(s) at the required voltage(s).
AAI offers the following solutions for the DC/DC
converter:
Flyback converters (see IPS10 series)
Push-pull converters (see IPS201 controller)
Other ICs and discrete solutions can be used as well.
More and more countries already impose PFC above
75W or soon will enforce this obligation.
In addition to the compliance with power factor and
line harmonics regulations, using a PFC offers other
advantages like:
Reducing the utility bill by making the actual
power drawn from the line almost equal to the
apparent power paid to the utility company
Allowing to draw more power from the wall
outlet or line circuit breaker without exceeding
the limits set by UL or other safety agencies.
FEATURES
Simple and easy to use.
High efficiency over 96% (in optimized designs)
Minimum external component count for lowest
cost.
3-input current-mode multiplier ensures
outstanding performance at any line voltage and
any load.
Under voltage protection.
Voltage error amplifier with provision for loop
stability compensation.
Cycle to cycle current limiting.
Thermal shut-down.
Capable of driving a broad range of power
MOSFETs.
Self oscillating at frequencies up to 300KHz
APPLICATIONS
SMPS.
Electronic ballast.
PIN CONFIGURATION: DIP-8 / SOIC-8
VCC 1
8 VAC
VDCFBK
OPOUT
IPS101
DRIVE
ISENSE
PKCAP 4
5 GND
ORDERING INFORMATION
Part No.
ROHS / Package Temperature Range
Pb-Free
IPS101C-D -G-LF 8-Pin PDIP 0°C to +70°C
IPS101I-D -G-LF 8-Pin PDIP -40°C to +85°C
IPS101C-SO -G-LF 8-Pin SOIC 0°C to +70°C
IPS101I-SO -G-LF 8-Pin SOIC -40°C to +85°C
For detailed ordering information, see page 14
Commercial
Industrial
Commercial
Industrial
© Copyright 2003-2006 - ASIC Advantage, Inc. – All rights reserved - Revision 10 – April 02, 2007
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IPS101C-SO pdf
IN-PLUG® IPS101 Datasheet Rev.10 - High Efficiency Power Factor Correction Controller
When the current reaches the peak value set by the output voltage of the multiplier which never exceeds 1.2V, the
MOSFET is switched off and the current in the inductor, still sensed by R9, decreases as the inductive energy is
dumped into the storage capacitor. When the current decreases below 50% of the peak value, the control logic turns
the MOSFET on again. The system is therefore self-oscillating and does not require any dedicated oscillator.
Please note that the frequency varies with the load and the line voltage, but against common belief:
- its variation usually stays in a 2:1 range,
- its jitter is favorable to the EMI signature,
- it decreases when the load increases which is excellent for the efficiency of the PFC.
MOSFET driver:
The MOSFET driver has been sized to be capable of driving power MOSFETs featuring a total gate charge up to
80nC.
Due to the continuous mode of operations of the inductor, the MOSFET must be driven with a reasonably (but not
excessively) low impedance, to minimize switching losses at both turn-on and turn-off without generating too
excessive EMI.
In term of Ron, the driver’s output devices are as follow:
- P-channel Ron:
30 Ω typical
- N-channel Ron:
20 Ω typical
A series resistor R7 on pin7 should be added to further reduce EMI and minimize the noise injection which could
result from Miller-capacitance kick-back during transient conditions.
Examples of suitable MOSFETS:
- IXYS PolarHTand Polar HVMOSFET series: IXTY1R4N60P, IXTY2N60P, IXTY3N60P
- Fairchild MOSFET series: FQPF1N60, FQPF 2N60, FQPF 3N60.
- Infineon COOLMOSTM series: SPD01N60S5, SPD02N60S5, SPD03N60S5.
- Motorola MOSFET series: MTP1N60, MTP2N60, MTP3N60.
- SGS-Thomson MOSFET series: STD1NB60, STD2NB60, STD3NB60.
- Etc…
Notes:
- Due to the rapid evolution of MOSFET technologies, please check for current models when designing a new
SMPS.
- PolarHTand Polar HVare trademarks of IXYS corporation
COOLMOSTM is a trademark of Infineon.
Thermal shutdown:
An internal temperature sensing protection circuit disables the MOSFET gate drive when the temperature exceeds a
typical value of 150°C. This circuit has sufficient hysteresis to prevent relaxation. Normal operations therefore only
resume when the junction temperature has dropped below approximately 120°C.
Shunt bandgap regulator:
The IPS101 internal trimmed bandgap shunt regulator behaves like a 10V zener but also provides the 2.06V
reference for the voltage error amplifier, and the various internal bias current and voltages required by the different
blocks.
During start-up, the current consumption in the regulator is very low, typically 100μA, allowing many possible
schemes to power the IPS101. Once the “zener” value is reached, the MOSFET gate drive is enabled and normal
operation starts. When enabled, the typical chip consumption is 660 μA plus the current necessary to drive the
MOSFET which depends on the MOSFET’s total gate charge and the frequency of operation (linked to L1
inductance value).
The VCC voltage is allowed to drop below the “zener” value during normal operations but the circuit will reset itself
and re-enter start-up mode should the VCC drop below approximately 8 volts.
© Copyright 2003-2006 - ASIC Advantage, Inc. – All rights reserved - Revision 10 – April 02, 2007
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IPS101C-SO arduino
IN-PLUG® IPS101 Datasheet Rev.10 - High Efficiency Power Factor Correction Controller
EXAMPLE OF POWER FACTOR CORRECTION: Universal Input, 400V DC, 100W output
D4
Figure 12
R3
976K 1%
R2
24K
C2
220nF
R4
4.99K 1%
C7
100nF
C6
47uF
R8
750K
Vcc
1
2
3
4
R1
1Meg
U1
VCC
VAC
VDCFBK DRIVE
COMPV ISENSE
RMSCAP GND
8
7
6
5
+
IPS101
C1 PFC Controller
1uF
R6
1K
R9
C3
0.5
1W
TX1 1.5mH
P=155T, S=12T
1N5406
D1 FR805
D2
1N4148
C8
47nF
R5
100
R7
100
Q1 9N60
C5
100uF
400V
D3
1N4148
PFC GND
DC OUT
400V DC
100W
0.47uF
250V
1
BR1 3
2A 400V
AC IN
85V - 285VAC
Note: 1mH to 10mH inductors (TX1) could be used depending on conditions and targeted characteristics.
Line current waveforms: measured on IPS-DK101 demo-kit
Vin= 230V, Pout=100W
© Copyright 2003-2006 - ASIC Advantage, Inc. – All rights reserved - Revision 10 – April 02, 2007
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