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PDF BTM7811K Data sheet ( Hoja de datos )

Número de pieza BTM7811K
Descripción TrilithIC
Fabricantes Infineon Technologies 
Logotipo Infineon Technologies Logotipo



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No Preview Available ! BTM7811K Hoja de datos, Descripción, Manual

Data Sheet, Rev. 1.0, May 2008
BTM7811K
TrilithIC
Automotive Power

1 page




BTM7811K pdf
Table 1
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Pin Definitions and Functions
Symbol Function
NC Not connected
SL1 Source of low-side switch 1
IL1 Analog input of low-side switch 1
NC Not connected
IH1 Digital input of high-side switch 1
ST1 Status of high-side switch 1; open Drain output
SH1 Source of high-side switch 1
DHVS Drain of high-side switches and power supply voltage
GND Ground of high-side switches
IH2 Digital input of high-side switch 2
ST2 Status of high-side switch 2; open Drain output
SH2 Source of high-side switch 2
IL2 Analog input of low-side switch 2
SL2 Source of low-side switch 2
NC Not connected
DL2 Drain of low-side switch 2
Heat-Slug 3
DHVS Drain of high-side switches and power supply voltage
Heat-Slug 2
DL1 Drain of low-side switch 1
Heat-Slug 1
Pins written in bold type need power wiring.
BTM7811K
Description
Data Sheet
5 Rev. 1.0, 2008-05-15

5 Page





BTM7811K arduino
BTM7811K
5.2 Functional Range
Pos.
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
Parameter
Supply voltage
Symbol Limit Values
min.
max.
VS VUVOFF 42
Supply voltage for PWM operation
Input voltage HS
Input voltage LS
Status output current
Junction temperature
VS(PWM)
VIH
VIL
IST
Tj
8
– 0.3
– 0.3
0
– 40
18
15
20
2
110
Unit
V
V
V
V
mA
°C
Remarks
After VS rising above
VUVON
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table
5.3 Thermal Resistance
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
5.3.1 LS-junction to case1)
RthJC L – – 1.05 K/W
5.3.2 HS-junction to case1)
RthJC H – – 1.45 K/W
5.3.3
Junction to ambient1)
RthJA = Tj(HS) / (P(HS)+ P(LS))
RthJA
16 –
K/W 2)
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Data Sheet
11 Rev. 1.0, 2008-05-15

11 Page







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