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PDF BTM7750GP Data sheet ( Hoja de datos )
| Número de pieza | BTM7750GP | |
| Descripción | TrilithIC | |
| Fabricantes | Infineon Technologies | |
| Logotipo |  |
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Data Sheet, Rev. 1.0, July 2008
BTM7750GP
TrilithIC
Automotive Power
1 page  
BTM7750GP
Table 1
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Pin Definitions and Functions
Symbol Function
IL1 Analog input of low-side switch 1
NC Not connected
SL1 Source of low-side switch 1
NC Not connected
SH1 Source of high-side switch 1
GND Ground of high-side switches
IH1 Digital input of high-side switch 1
DHVS Drain of high-side switches and power supply voltage
ST Status; open Drain output
IH2 Digital input of high-side switch 2
SH2 Source of high-side switch 2
NC Not connected
IL2 Analog input of low-side switch 2
NC Not connected
SL2 Source of low-side switch 2
DL2 Drain of low-side switch 2
Heat-Slug 3 or Heat-Dissipator
DHVS Drain of high-side switches and power supply voltage
Heat-Slug 2 or Heat-Dissipator
DL1 Drain of low-side switch 1
Heat-Slug 1 or Heat-Dissipator
Pins written in bold type need power wiring.
Data Sheet
5 Rev. 1.0, 2008-07-07
5 Page 
BTM7750GP
5.2 Functional Range
Pos. Parameter
5.2.19 Supply voltage
5.2.20
5.2.21
5.2.22
5.2.23
Input voltage HS
Input voltage LS
Status output current
Junction temperature
Symbol Limit Values
min.
max.
VS VUVOFF 42
VIH
– 0.3
15
VIL
– 0.3
10
IST 0
2
Tj – 40 110
Unit
V
V
V
mA
°C
Remarks
After VS rising above
VUVON
–
–
–
–
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table
5.3 Thermal Resistance
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
5.3.24 LS-junction to soldering point1)
RthJSP
–
–
1.7 K/W
5.3.25 HS-junction to soldering point1)
RthJSP
–
–
1.7 K/W
5.3.26 Junction to Ambient1)
RthJA = Tj(HS) / (P(HS)+ P(LS))
RthJA
–
16 –
K/W 2)
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Data Sheet
11 Rev. 1.0, 2008-07-07
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet BTM7750GP.PDF ] | |
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