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PDF AP22850 Data sheet ( Hoja de datos )
| Número de pieza | AP22850 | |
| Descripción | 10V SINGLE CHANNEL PROGRAMMABLE LOAD SWITCH | |
| Fabricantes | Diodes | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AP22850 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
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AP22850
10V SINGLE CHANNEL PROGRAMMABLE LOAD S0WITCH
Description
AP22850 is an integrated P-Channel load switch, which features an
adjustable ramp-up and discharge rate that can be set via an external
capacitor and a resistor, respectively. In addition, it incorporates a
“power good” output to flag when the switch is fully enhanced. The P-
Channel switch has a typical RDS(ON) of 21mΩ, enabling a current
handling capability of up to 8A.
AP22850 is designed to operate from 4.5V to 11V. The near-zero
quiescent supply current makes it ideal for use in battery powered
distribution systems where power consumption is a concern.
Even as a P-Channel load switch, AP22850 does not require an
external gate pull-up resistor, and consequently, stays true to its
headlining feature of near-zero quiescent current specification. It also
features circuitry to suppress fast input transients (with EN low) from
coupling to VOUT.
Pin Assignments
Top View
Bottom View
SS 1
EN 2
VIN 3
VIN 4
VOUT
8 DIS
8
7 PG
7
6 VBIAS 6
5 GND 5
W-DFN2020-8
VOUT
1 SS
2 EN
3 VIN
4 VIN
Feature
Near-Zero Quiescent Current
No External Gate Pull-Up Resistor Required
Suppresses Fast Transients on VIN
4.5V to 11V Input Voltage Range
Low Typical RDS(ON) of 21mΩ
Adjustable Start-Up and Discharge Rate
Small Form Factor Package W-DFN2020-8
– Footprint of just 4mm2
Thermally Efficient Package with an Exposed Pad
Case Material: Molded Plastic, “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Lead-Free Plating (NiPdAu Finish over Copper Leadframe).
Terminals: Solderable per MIL-STD-202, Method 208 e4
Weight: TBD grams (Approximate)
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Applications
Integrated Load Switches in Ultrabook PCs
Power Up/Down Sequencing in Ultrabook PCs
Tablets
Notebooks / Netbooks
E-Readers
Consumer Electronics
Set-Top Boxes
Industrial Systems
Telecom Systems
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
AP22850
Document number: DS36540 Rev. 2 - 2
1 of 14
www.diodes.com
March 2015
© Diodes Incorporated
1 page  
AP22850
0
Switching Characteristics (@TA = +25°C, VBIAS = 2.5V – 5.5V, CIN = 1µF, CL = 100nF, unless otherwise specified)
Symbol
Parameters
tRISE
Output Rise Time
tON Output Turn-ON Delay Time
tFALL
Output Fall Time
tOFF Output Turn-OFF Delay Time
tD Output Start Delay Time
tPG Power Good Delay Time
Conditions
RL = 10Ω, CSS = 10nF
RL = 10Ω, CSS = 10nF
RL = Open, RDIS = 240Ω,
CSS = 10nF
RL = Open, RDIS = 240Ω,
CSS = 10nF
RL = 10Ω, CSS = 10nF
RL = 10Ω, CSS = 10nF
VIN = 10.0V
VIN = 8.4V
VIN = 5.0V
VIN = 10.0V
VIN = 8.4V
VIN = 5.0V
VIN = 10.0V
VIN = 8.4V
VIN = 5.0V
VIN = 10.0V
VIN = 8.4V
VIN = 5.0V
VIN = 10.0V
VIN = 8.4V
VIN = 5.0V
VIN = 10.0V
VIN = 8.4V
VIN = 5.0V
Min Typ Max Unit
100
- 102 -
104
70
- 75 -
82
70
- 71 -
75
41
- 45 -
60
12
- 16 -
22
250
- 230 -
205
µs
µs
µs
µs
µs
µs
tON/tOFF Waveforms
VEN
VOUT
VPG
50%
tON
tD
50%
50%
tOFF
50%
50%
tPG
VOUT
90%
10%
tRISE
90%
tFALL
10%
AP22850
Document number: DS36540 Rev. 2 - 2
5 of 14
www.diodes.com
March 2015
© Diodes Incorporated
5 Page 
Board Layout and Thermal Considerations
AP22850
0
Due to the high current capacity of the load switch, PCB layout needs to ensure good thermal distribution during operation. The top and bottom of
AP22850EV1, (the evaluation board for AP22850), can be seen below.
Figure 3 PCB Copper Layout & Silk Screen – Top
Figure 4 PCB Copper Layout & Silk Screen – Bottom
Thermal vias are used directly underneath the chip to help distribute the heat from the device. The ground plane on the underside of the board
effectively acts as a large heatsink. The widths of the tracks carrying VIN and VOUT are kept wide. Vias are also distributed around the board to
aid thermal conduction and to ensure a consistent potential, particularly around the ground connections of the capacitors. All capacitors used are
located as close as possible to the AP22850 to minimize any parasitic effects.
The maximum junction temperature of the AP22850 is +125°C. To ensure that this is not exceeded, the following equation can be used to give an
approximation of junction temperature. Temperature readings taken with a thermal camera can also give a good approximation of power
dissipation with the use of this equation. The board layout has a major influence on the parameter .
Where,
= Junction Temperature (°C)
= Ambient Temperature (°C)
= Junction to Ambient Thermal Impedance (°C/W)
= Power Dissipation (voltage drop across device output current) (W)
AP22850
Document number: DS36540 Rev. 2 - 2
11 of 14
www.diodes.com
March 2015
© Diodes Incorporated
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet AP22850.PDF ] | |
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