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Toshiba Semiconductor - OCTAL D-TYPE LATCH WITH 3-STATE OUTPUT

Numéro de référence TC74ACT573FT
Description OCTAL D-TYPE LATCH WITH 3-STATE OUTPUT
Fabricant Toshiba Semiconductor 
Logo Toshiba Semiconductor 





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TC74ACT573FT fiche technique
TC74ACT573P/F/FW/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74ACT573P,TC74ACT573F,TC74ACT573FW,TC74ACT573FT
Octal D-Type Latch with 3-State Output
The TC74ACT573 is an advanced high speed CMOS OCTAL
LATCH fabricated with silicon gate and double-layer metal
wiring C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This device may be used as a level converter for interfacing
TTL or NMOS to High Speed CMOS. The inputs are compatible
with TTL, NMOS and CMOS output voltage levels.
These 8-bit D-type latches are controlled by a latch enable (LE)
and a output enable input ( OE ).
When the OE input is high, the eight outputs are in a high
impedance state.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: tpd = 5.5 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 8 µA (max) at Ta = 25°C
Compatible with TTL outputs: VIL = 0.8 V (max)
VIH = 2.0 V (min)
Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50
transmission lines.
Balanced propagation delays: tpLH ∼− tpHL
Pin and function compatible with 74F573
Note: xxxFW (JEDEC SOP) is not available in
Japan.
TC74ACT573P
TC74ACT573F
TC74ACT573FW
TC74ACT573FT
Weight
DIP20-P-300-2.54A
: 1.30 g (typ.)
SOP20-P-300-1.27A
: 0.22 g (typ.)
SOP20-P-300-1.27
: 0.22 g (typ.)
SOL20-P-300-1.27
: 0.46 g (typ.)
TSSOP20-P-0044-0.65A : 0.08 g (typ.)
1 2006-06-01

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