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NVD20N03L27 fiches techniques PDF

ON Semiconductor - Power MOSFET ( Transistor )

Numéro de référence NVD20N03L27
Description Power MOSFET ( Transistor )
Fabricant ON Semiconductor 
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NVD20N03L27 fiche technique
NTD20N03L27, NVD20N03L27
Power MOSFET
20 A, 30 V, N−Channel DPAK
This logic level vertical power MOSFET is a general purpose part
that provides the “best of design” available today in a low cost power
package. Avalanche energy issues make this part an ideal design in.
The drain−to−source diode has a ideal fast but soft recovery.
Features
Ultra−Low RDS(on), Single Base, Advanced Technology
SPICE Parameters Available
Diode is Characterized for use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperatures
High Avalanche Energy Specified
ESD JEDAC rated HBM Class 1, MM Class A, CDM Class 0
NVD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
Typical Applications
Power Supplies
Inductive Loads
PWM Motor Controls
Replaces MTD20N03L in many Applications
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 1.0 MW)
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (tpv10 ms)
Drain Current
− Continuous @ TA = 25_C
− Continuous @ TA = 100_C
− Single Pulse (tpv10 ms)
Total Power Dissipation @ TA = 25_C
Derate above 25°C
Total Power Dissipation @ TC = 25°C (Note 1)
Operating and Storage Temperature Range
VDSS
VDGR
VGS
VGS
30
30
±20
±24
Vdc
Vdc
Vdc
ID
ID
IDM
PD
TJ, Tstg
20
16
60
74
0.6
1.75
−55 to
150
Adc
Apk
W
W/°CW
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 30 Vdc, VGS = 5 Vdc, L = 1.0 mH,
IL(pk) = 24 A, VDS = 34 Vdc)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
− Junction−to−Ambient (Note 1)
Maximum Lead Temperature for Soldering
Purposes, 1/8from case for 10 seconds
EAS
RqJC
RqJA
RqJA
TL
288 mJ
°C/W
1.67
100
71.4
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using the minimum recommended
pad size and repetitive rating; pulse width limited by maximum junction
temperature.
http://onsemi.com
20 A, 30 V, RDS(on) = 27 mW
N−Channel
D
G
S
4
12
3
DPAK
CASE 369C
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENTS
4
Drain
1
Gate
2
Drain
3
Source
A = Assembly Location*
20N3L = Device Code
Y = Year
WW = Work Week
G = Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 6
1
Publication Order Number:
NTD20N03L27/D

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