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PDF YGV630 Data sheet ( Hoja de datos )
| Número de pieza | YGV630 | |
| Descripción | Advanced Video Display Processor 8 | |
| Fabricantes | YAMAHA | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de YGV630 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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CONFIDENTIAL
YGV630 PRELIMINARY
AVDP8
Advanced Video Display Processor 8
■ Overview
YGV630 (AVDP8) is an in-car image control device, which has video decoder function, video image
correction function, scaler function, multiscreen control function, etc., as well as the inherited features as
AVDP series high-performance OSD (On Screen Display) controller.
■ Features
□ CPU Interface
16 bits or 32 bits Data Bus width selection
Byte-write operation with WR3-0_N pin
Supports data access in both big-endian and little–endian formats
Direct rendering to the entire video memory space from CPU
Prepares interrupt pin
Controllable Bus Wait and Bus Ready signals
□ Clock
Built-in PLL for system clock generation
Built-in PLL for dot clock generation
□ Analog Video Input
12-channel analog video inputs
Supports Composite Video, S Video, Component Video input
supports NTSC-M, NTSC-JAPAN, PAL-I,B,G,H,D,N, combination N
Supports analog RGB input (supports only progressive scan)
Up to 4-line analog RGB connection
□ Digital Video Input
Supports ITU-R BT.656
Supports Digital RGB (6-bit each)
Supports both interlace scan and progressive scan
Dot clock of 75MHz or lower
Digital RGB (6-bit each) input up to 1 channel or ITU-R BT.656 input up to 2 channels
YGV630 CATALOG
CATALOG No.: LSI-4GV630A00
2006.5
1 page  
YGV630
CONFIDENTIAL
■ Example of System Configuration
Camera monitoring system
CPU
Camera video input 12 channels (max.)
Camera
Camera
Camera
CVBS
CVBS
CVBS
AVDP8
Analog video output
Digital video output
Video + OSD
analog RGB
digital RGB
LCD
(QVGA to XGA)
Camera
CVBS
Resolution conversion + OSD
Video
Memory
In-car Rear Seat Entertainment system (RSE)
Analog video input 12 channels (max.)
Digital video input 1 channel
Graphic
Controller
LSI
DVD Player
TV tuner
Camera
VCR
AUX
Hsync Vsync
Dotclock
analog RGB
digital RGB
CVBS
S-video
YCrCb
ITU656
CVBS
S-video
CVBS
CVBS
CVBS
S-video
YCrCb
CPU
AVDP8
Analog video output
Digital video output
Video + OSD
analog RGB
digital RGB
LCD
(QVGA to XGA)
Resolution Conversion + OSD
Video
Memory
-5-
5 Page 
YGV630
CONFIDENTIAL
■ Pin Assignment Table
No. Pin Number
1 A1
2 A2
3 A3
4 A4
5 A5
6 A6
7 A7
8 A8
9 A9
10 A10
11 A11
12 A12
13 A13
14 A14
15 A15
16 A16
17 A17
18 A18
19 A19
20 A20
21 A21
22 A22
23 A23
24 B1
25 B2
26 B3
27 B4
28 B5
29 B6
30 B7
31 B8
32 B9
33 B10
34 B11
35 B12
36 B13
37 B14
38 B15
39 B16
40 B17
41 B18
42 B19
43 B20
44 B21
45 B22
46 B23
47 C1
Pin Name
XIN1
DGCKIN0
AHSIN0_N
GI6
GI2
REFCKS0
REFCKS1
VSS
GI23/D31
GI19/D27
GI16/D24
GI12/D20
GI8/D16
D12
D9
D6
D3
INT_N
VDD33
A19
A16
A14
A13
XOUT1
AGCKIN0
AVSIN0_N
GI5
GI1
VSS
XTEST0
VDD33
GI22/D30
GI18/D26
GI15/D23
GI11/D19
D15
D11
VDD33
D5
D2
READY_N
A22
A18
A15
A11
A12
PLLVDD
IO
I
I
I
I
I
I
I
IO
IO
IO
IO
IO
IO
IO
IO
IO
OT
I
I
I
I
O
I
I
I
I
I
IO
IO
IO
IO
IO
IO
IO
IO
OT
I
I
I
I
I
-11-
No.
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
Pin Number
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
E1
E2
Pin Name
VSS
GI7
GI4
GI0
VDD33
XTEST1
C32_N
GI21/D29
GI17/D25
GI14/D22
GI10/D18
D14
VSS
D8
D4
D1
WAIT_N
A21
A17
A8
A9
A10
PLLVSS
PLLVDD
PLLVSS
GI3
RESET_N
VDD18
XTEST2
VDD18
GI20/D28
VSS
GI13/D21
GI9/D17
D13
D10
D7
VSS
D0
VSS
A20
A4
A5
A6
A7
VCM
AFEVSS
IO
I
I
I
I
I
IO
IO
IO
IO
IO
IO
IO
IO
OT
I
I
I
I
I
I
I$
I
IO
IO
IO
IO
IO
IO
IO
I
I
I
I
I
AO
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet YGV630.PDF ] | |
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