PDF AT90PWM161 Data sheet ( Hoja de datos )

Número de pieza	AT90PWM161
Descripción	8-bit Microcontroller
Fabricantes	ATMEL Corporation
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Features • High performance, low power Atmel®AVR® 8-bit Microcontroller • Advanced RISC architecture – 131 powerful instructions - most single clock cycle execution – 32 × 8 general purpose working registers – Fully static operation – Up to 1 MIPS throughput per MHz – On-chip 2-cycle multiplier • Data and non-volatile program memory – 8/16Kbytes of in-system programmable program memory flash • Endurance: 10,000 write/erase cycles • Lock bits protection • Optional 2/4Kbytes boot code section with independent lock bits • In-system programming by on-chip boot program • True read-while-write operation – 512 Bytes of in-system programmable EEPROM • Four bytes page size – 256/1024 Bytes Internal SRAM • On-chip debug support (debugWIRE) • Peripheral features – One 12-bit high speed PSC (Power Stage Controllers with extended PSC2 features) • Non overlapping inverted PWM output pins with flexible dead-time • Variable PWM duty cycle and frequency • Synchronous update of all PWM registers • Enhanced resolution mode (16 bits) • Additional register for ADC synchronization • Input capture • Four output pins and output matrix – One 12-bit high speed PSC (Power Stage Controller) • Auto-stop function for event driven PFC implementation • Non overlapping inverted PWM output pins with flexible dead-time • Variable PWM duty cycle and frequency • Synchronous update of all PWM registers • Enhanced resolution mode (16 bits) • Input capture – One 16-bit simple general purpose timer/counter – 10-bit ADC • Up to 11 single ended channels and one fully differential ADC channel pair • Programmable gain (5×, 10×, 20×, 40× on differential channel) • Internal reference voltage – One 10-bit DAC – Three analog comparators with • Resistor-array to adjust comparison voltage • DAC to adjust comparison voltage – One SPI – Three external interrupts – Programmable watchdog timer with separate on-chip oscillator • Special microcontroller features – Low power idle, noise reduction, and power down modes 8-bit Atmel Microcontroller with 8/16K Bytes In-System Programmable Flash AT90PWM81 AT90PWM161 7734Q–AVR–02/12 1 page AT90PWM81/161 Table 2-1. Functions description. MNEMONIC GND AGND VCC AVCC AREF CLKO RESET# OCD XTAL1 XTAL2 NAME, FUNCTION & ALTERNATE FUNCTION Ground: 0V reference Analog Ground: 0V reference for analog part Power Supply Analog Power Supply: This is the power supply voltage for analog part For a normal use this pin must be connected. Analog Reference: Reference for analog converter. This is the reference voltage of the A/D converter. As output, can be used by external analog System Clock Output Reset Input On Chip Debug I/O XTAL Input XTAL Output MISO MOSI SCK SS INTn Tn SPI Master In Slave Out SPI Master Out Slave In SPI Clock SPI Slave Select External interrupt n Timer n clock input PSCOUTxn PSCINx PSCOUT0n PSCINr PSCx output n PSCx Digital Input PSC reduced output n PSC reduced Digital Input ACMPn ACMPMn ACMPM ACOMPn_OUT AMPn- AMPn+ ADCn Analog Comparator n Positive Input Analog Comparator n Negative Input Negative input for analog comparators Analog Comparator n Output Analog Differential Amplifier n Input Channel Analog Differential Amplifier n Input Channel Analog Converter Input Channel n 7734Q–AVR–02/12 5 5 Page AT90PWM81/161 • Bit 0 – C: Carry Flag The Carry Flag C indicates a carry in an arithmetic or logic operation. See the “Instruction Set Summary” on page 301 for detailed information. 3.5 General Purpose Register File The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve the required performance and flexibility, the following input/output schemes are supported by the Register File: • One 8-bit output operand and one 8-bit result input • Two 8-bit output operands and one 8-bit result input • Two 8-bit output operands and one 16-bit result input • One 16-bit output operand and one 16-bit result input Figure 3-2 shows the structure of the 32 general purpose working registers in the CPU. Figure 3-2. AVR CPU General Purpose Working Registers. 3.5.1 General Purpose Working Registers 70 R0 R1 R2 … R13 R14 R15 R16 R17 … R26 R27 R28 R29 R30 R31 Addr. 0x00 0x01 0x02 0x0D 0x0E 0x0F 0x10 0x11 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F X-register Low Byte X-register High Byte Y-register Low Byte Y-register High Byte Z-register Low Byte Z-register High Byte Most of the instructions operating on the Register File have direct access to all registers, and most of them are single cycle instructions. As shown in Figure 3-2, each register is also assigned a data memory address, mapping them directly into the first 32 locations of the user Data Space. Although not being physically imple- mented as SRAM locations, this memory organization provides great flexibility in access of the registers, as the X-, Y- and Z-pointer registers can be set to index any register in the file. The X-register, Y-register, and Z-register The registers R26..R31 have some added functions to their general purpose usage. These reg- isters are 16-bit address pointers for indirect addressing of the data space. The three indirect address registers X, Y, and Z are defined as described in Figure 3-3 on page 12. 7734Q–AVR–02/12 11 11 Page

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