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PDF ATmega32M1 Data sheet ( Hoja de datos )
| Número de pieza | ATmega32M1 | |
| Descripción | 8-bit Atmel megaAVR Microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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8-bit Atmel megaAVR Microcontroller
ATmega16M1 / ATmega32M1 / ATmega64M1
Features
• High performance, low power Atmel® AVR® 8-bit microcontroller
• Advanced RISC architecture
– 131 powerful instructions - most single clock cycle execution
– 32 × 8 general purpose working registers
– Fully static operation
– Up to 1 MIPS throughput per MHz
– On-chip 2-cycle multiplier
• Data and non-volatile program memory
– 16/32/64KBytes flash of in-system programmable program memory
– 512B/1K/2KBytes of in-system programmable EEPROM
– 1/2/4KBytes internal SRAM
– Write/erase cycles: 10,000 flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/ 100 years at 25°C (1)
– Optional boot code section with independent lock bits
In-system programming by on-chip boot program
True read-while-write operation
– Programming lock for flash program and EEPROM data security
• On-chip debug interface (debugWIRE)
• CAN 2.0A/B with six message objects - ISO 16845 certified
• LIN 2.1 and 1.3 controller or 8-bit UART
• One 12-bit high speed PSC (power stage controller)
– Non overlapping inverted PWM output pins with flexible dead-time
– Variable PWM duty cycle and frequency
– Synchronous update of all PWM registers
– Auto stop function for emergency event
• Peripheral features
– One 8-bit general purpose timer/counter with separate prescaler, compare mode and capture mode
– One 16-bit general purpose timer/counter with separate prescaler, compare mode and capture mode
– One master/slave SPI serial interface
– 10-bit ADC
Up to 11 single ended channels and three fully differential ADC channel pairs
Programmable gain (5×, 10×, 20×, 40×) on differential channels
Internal reference voltage
Direct power supply voltage measurement
– 10-bit DAC for variable voltage reference (comparators, ADC)
– Four analog comparators with variable threshold detection
– 100µA ±2% current source (LIN node identification)
– Interrupt and wake-up on pin change
– Programmable watchdog timer with separate on-chip oscillator
– On-chip temperature sensor
• Special microcontroller features
– Low power idle, noise reduction, and power down modes
– Power on reset and programmable brown-out detection
– In-system programmable via SPI port
– High precision crystal oscillator for CAN operations (16MHz)
– Internal calibrated RC oscillator (8MHz)
– On-chip PLL for fast PWM (32MHz, 64MHz) and CPU (16MHz)
• Operating voltage: 2.7V - 5.5V
• Extended operating temperature:
– -40°C to +85°C
• Core speed grade:
– 0 - 8MHz @ 2.7 - 4.5V
– 0 - 16MHz @ 4.5 - 5.5V
8209E–AVR–11/2012
1 page  
Table 1-1. Pinout description. (Continued)
Note:
QFN32 pin
number
Mnemonic
Type
Name, function, and alternate function
ADC1 (Analog Input Channel 1)
RXD (UART Rx data)
RXLIN (LIN Receive Input)
12 PD4 I/O
ICP1A (Timer 1 input capture alternate A input)
SCK_A (Programming & alternate SPI Clock)
PCINT20 (Pin Change Interrupt 20)
ADC2 (Analog Input Channel 2)
13 PD5 I/O ACMP2 (Analog Comparator 2 Positive Input)
PCINT21 (Pin Change Interrupt 21)
ADC3 (Analog Input Channel 3)
ACMPN2 (Analog Comparator 2 Negative Input)
14 PD6 I/O
INT0 (External Interrupt 0 Input)
PCINT22 (Pin Change Interrupt 22)
ACMP0 (Analog Comparator 0 Positive Input)
15 PD7 I/O
PCINT23 (Pin Change Interrupt 23)
RESET (Reset Input)
31 PE0 I/O or I OCD (On Chip Debug I/O)
PCINT24 (Pin Change Interrupt 24)
XTAL1 (XTAL Input)
10 PE1 I/O OC0B (Timer 0 Output Compare B)
PCINT25 (Pin Change Interrupt 25)
XTAL2 (XTAL Output)
11 PE2 I/O ADC0 (Analog Input Channel 0)
PCINT26 (Pin Change Interrupt 26)
1. Only for Atmel Atmega32M1/64M1.
2. On the engineering samples, the ACMPN3 alternate function is not located on PC4. It is located on PE2.
2. Overview
The Atmel ATmega16M1/32M1/64M1 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced
RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega16M1/32M1/64M1
achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption
versus processing speed.
ATmega16M1/32M1/64M1 [DATASHEET]
8209E–AVR–11/2012
5
5 Page 
6.3.1 SREG – AVR Status Register
Bit
Read/write
Initial value
7
I
R/W
0
6
T
R/W
0
5
H
R/W
0
4
S
R/W
0
3
V
R/W
0
2
N
R/W
0
1
Z
R/W
0
0
C
R/W
0
SREG
• Bit 7 – I: Global Interrupt Enable
The Global Interrupt Enable bit must be set to enabled the interrupts. The individual interrupt enable control is then
performed in separate control registers. If the Global Interrupt Enable Register is cleared, none of the interrupts are
enabled independent of the individual interrupt enable settings. The I-bit is cleared by hardware after an interrupt
has occurred, and is set by the RETI instruction to enable subsequent interrupts. The I-bit can also be set and
cleared by the application with the SEI and CLI instructions, as described in the instruction set reference.
• Bit 6 – T: Bit Copy Storage
The Bit Copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit as source or destination for the oper-
ated bit. A bit from a register in the Register File can be copied into T by the BST instruction, and a bit in T can be
copied into a bit in a register in the Register File by the BLD instruction.
• Bit 5 – H: Half Carry Flag
The Half Carry Flag H indicates a Half Carry in some arithmetic operations. Half Carry Is useful in BCD arithmetic.
See the “Instruction set summary” on page 319 for detailed information.
• Bit 4 – S: Sign Bit, S = N V
The S-bit is always an exclusive or between the negative flag N and the Two’s Complement Overflow Flag V. See
the “Instruction set summary” on page 319 for detailed information.
• Bit 3 – V: Two’s Complement Overflow Flag
The Two’s Complement Overflow Flag V supports two’s complement arithmetics. See the “Instruction set sum-
mary” on page 319 for detailed information.
• Bit 2 – N: Negative Flag
The Negative Flag N indicates a negative result in an arithmetic or logic operation. See the “Instruction set sum-
mary” on page 319 for detailed information.
• Bit 1 – Z: Zero Flag
The Zero Flag Z indicates a zero result in an arithmetic or logic operation. See the “Instruction set summary” on
page 319 for detailed information.
• Bit 0 – C: Carry Flag
The Carry Flag C indicates a carry in an arithmetic or logic operation. See the “Instruction set summary” on page
319 for detailed information.
ATmega16M1/32M1/64M1 [DATASHEET]
8209E–AVR–11/2012
11
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