|
|
PDF ATxmega64B1 Data sheet ( Hoja de datos )
| Número de pieza | ATxmega64B1 | |
| Descripción | Atmel AVR XMEGA B1 8- and 16-bit Microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ATxmega64B1 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
Atmel AVR XMEGA B1 8- and 16-bit Microcontroller
ATxmega128B1 / ATxmega64B1
Features
High-performance, low-power Atmel® AVR® XMEGA® 8- and16-bit Microcontroller
Nonvolatile program and data memories
64K - 128KBytes of in-system self-programmable flash
4K - 8KBytes boot section
2KBytes EEPROM
4K - 8KBytes internal SRAM
Peripheral features
Two-channel DMA controller
Four-channel event system
Three 16-bit timer/counters
Two timer/counters with four output compare or input capture channels
One timer/counter with two output compare or input capture channels
High resolution extensions one timer/counter
Advanced waveform extension (AWeX) on one timer/counter
Split mode on two timer/counters
One USB device interface
USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant
32 endpoints with full configuration flexibility
Two USARTs with IrDA support for one USART
AES and DES crypto engine
CRC-16 (CRC-CCITT) and CRC-32 (IEEE® 802.3) generator
One two-wire interface with dual address match (I2C and SMBus compatible)
One serial peripheral interface (SPI)
16-bit Real Time Counter (RTC) with separate oscillator
Liquid Crystal Display (LCD)
Up to 4x40 segment driver
Built in contrast control
ASCII character mapping
Flexible SWAP of segment and common terminals buses
Two eight-channel, 12-bit, three hundred thousand SPS Analog to Digital Converters
Four Analog Comparators with window compare function, and current source feature
External interrupts on all general purpose I/O pins
Programmable watchdog timer with separate on-chip ultra low power oscillator
QTouch® library support
Capacitive touch buttons, sliders and wheels
Special microcontroller features
Power-on reset and programmable brown-out detection
Internal and external clock options with PLL
Programmable multilevel interrupt controller
Five sleep modes
Programming and debug interfaces
JTAG (IEEE 1149.1 Compliant) interface, including boundary scan
PDI (Program and Debug Interface)
I/O and packages
53 Programmable I/O pins
100-lead TQFP, 100-ball VFBGA
Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014
1 page  
Figure 2-2. VFBGA Pinout
Top view
1 2 3 4 5 6 7 8 9 10
A
B
C
D
E
F
G
H
J
K
Bottom view
10 9 8 7 6 5 4 3 2 1
A
B
C
D
E
F
G
H
J
K
Table 2-1. VFBGA Pinout
12
A PC0 VCC
B PC3 GND
C PC5 PC4
D
VCC
GND
E
PD2
PDI/
RESET
F
VCC
GND
G PE2 PE1
H PE5 PE6
J
PE7
PG0/
SEG39
K
GND
VCC
3
PB6
PB7
PC1
PD0
PD1
PDI
PE3
PG1/
SEG38
PG3/
SEG36
PG2/
SEG37
45
PB2 AVCC
PB4 AGND
PB5 PA7
PC2 PB0
PC6 PB1
PC7 PB3
PE0
PG4/
SEG35
PG6/
SEG33
PG5/
SEG34
PE4
PG7/
SEG32
PM1/
SEG30
PM0/
SEG31
6
PA5
PA4
PA3
PA6
PA2
PM2/
SEG29
SEG23
PM5/
SEG26
PM4/
SEG27
PM3/
SEG28
7
PA1
PA0
COM3
SEG0
SEG1
8
PR1
PR0
COM0
VLCD
SEG4
SEG10 SEG7
SEG15 SEG13
SEG21 SEG18
PM7/
SEG24
PM6/
SEG25
SEG20
SEG22
9
COM2
COM1
BIAS2
GND
SEG3
SEG6
SEG9
SEG12
SEG16
SEG19
10
CAPH
CAPL
BIAS1
VCC
SEG2
SEG5
SEG8
SEG11
SEG14
SEG17
XMEGA B1 [DATASHEET]
Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014
5
5 Page 
6.5 Program Flow
After reset, the CPU starts to execute instructions from the lowest address in the flash program memory ‘0.’ The program
counter (PC) addresses the next instruction to be fetched.
Program flow is provided by conditional and unconditional jump and call instructions capable of addressing the whole
address space directly. Most AVR instructions use a 16-bit word format, while a limited number use a 32-bit format.
During interrupts and subroutine calls, the return address PC is stored on the stack. The stack is allocated in the general
data SRAM, and consequently the stack size is only limited by the total SRAM size and the usage of the SRAM. After
reset, the stack pointer (SP) points to the highest address in the internal SRAM. The SP is read/write accessible in the
I/O memory space, enabling easy implementation of multiple stacks or stack areas. The data SRAM can easily be
accessed through the five different addressing modes supported in the AVR CPU.
6.6 Status Register
The status register (SREG) contains information about the result of the most recently executed arithmetic or logic
instruction. This information can be used for altering program flow in order to perform conditional operations. Note that
the status register is updated after all ALU operations, as specified in the instruction set reference. This will in many
cases remove the need for using the dedicated compare instructions, resulting in faster and more compact code.
The status register is not automatically stored when entering an interrupt routine nor restored when returning from an
interrupt. This must be handled by software.
The status register is accessible in the I/O memory space.
6.7 Stack and Stack Pointer
The stack is used for storing return addresses after interrupts and subroutine calls. It can also be used for storing
temporary data. The stack pointer (SP) register always points to the top of the stack. It is implemented as two 8-bit
registers that are accessible in the I/O memory space. Data are pushed and popped from the stack using the PUSH and
POP instructions. The stack grows from a higher memory location to a lower memory location. This implies that pushing
data onto the stack decreases the SP, and popping data off the stack increases the SP. The SP is automatically loaded
after reset, and the initial value is the highest address of the internal SRAM. If the SP is changed, it must be set to point
above address 0x2000, and it must be defined before any subroutine calls are executed or before interrupts are enabled.
During interrupts or subroutine calls, the return address is automatically pushed on the stack. The return address can be
two or three bytes, depending on program memory size of the device. For devices with 128KB or less of program
memory, the return address is two bytes, and hence the stack pointer is decremented/incremented by two. For devices
with more than 128KB of program memory, the return address is three bytes, and hence the SP is decremented/
incremented by three. The return address is popped off the stack when returning from interrupts using the RETI
instruction, and from subroutine calls using the RET instruction.
The SP is decremented by one when data are pushed on the stack with the PUSH instruction, and incremented by one
when data is popped off the stack using the POP instruction.
To prevent corruption when updating the stack pointer from software, a write to SPL will automatically disable interrupts
for up to four instructions or until the next I/O memory write.
6.8 Register File
The register file consists of 32 x 8-bit general purpose working registers with single clock cycle access time. The register
file supports the following input/output schemes:
One 8-bit output operand and one 8-bit result input
Two 8-bit output operands and one 8-bit result input
Two 8-bit output operands and one 16-bit result input
One 16-bit output operand and one 16-bit result input
Six of the 32 registers can be used as three 16-bit address register pointers for data space addressing, enabling efficient
address calculations. One of these address pointers can also be used as an address pointer for lookup tables in flash
program memory.
XMEGA B1 [DATASHEET]
Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ATxmega64B1.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ATxmega64B1 | Atmel AVR XMEGA B1 8- and 16-bit Microcontroller | ATMEL Corporation |
| ATxmega64B3 | 8/16-bit Atmel XMEGA B3 Microcontroller | ATMEL Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |