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PDF ATxmega64A1U Data sheet ( Hoja de datos )
| Número de pieza | ATxmega64A1U | |
| Descripción | 8/16-bit Atmel XMEGA A1U Microcontroller | |
| Fabricantes | ATMEL Corporation | |
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Features
8/16-bit Atmel XMEGA A1U Microcontroller
ATxmega128A1U / ATxmega64A1U
z High-performance, low-power Atmel® AVR® XMEGA® 8/16-bit Microcontroller
z Nonvolatile program and data memories
z 64K - 128KBytes of in-system self-programmable flash
z 4K - 8KBytes boot section
z 2KBytes EEPROM
z 4K - 8KBytes internal SRAM
z External bus interface for up to 16Mbytes SRAM
z External bus interface for up to 128Mbit SDRAM
z Peripheral features
z Four-channel DMA controller
z Eight-channel event system
z Eight 16-bit timer/counters
z Four timer/counters with 4 output compare or input capture channels
z Four timer/counters with 2 output compare or input capture channels
z High resolution extension on all timer/counters
z Advanced waveform extension (AWeX) on two timer/counters
z One USB device interface
z USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant
z 32 Endpoints with full configuration flexibility
z Eight USARTs with IrDA support for one USART
z Four two-wire interfaces with dual address match (I2C and SMBus compatible)
z Four serial peripheral interfaces (SPIs)
z AES and DES crypto engine
z CRC-16 (CRC-CCITT) and CRC-32 (IEEE® 802.3) generator
z 16-bit real time counter (RTC) with separate oscillator
z Two sixteen channel, 12-bit, 2msps Analog to Digital Converters
z Two Two-channel, 12-bit, 1msps Digital to Analog Converters
z Four Analog Comparators (ACs) with window compare function, and current sources
z External interrupts on all general purpose I/O pins
z Programmable watchdog timer with separate on-chip ultra low power oscillator
z QTouch® library support
z Capacitive touch buttons, sliders and wheels
z Special microcontroller features
z Power-on reset and programmable brown-out detection
z Internal and external clock options with PLL and prescaler
z Programmable multilevel interrupt controller
z Five sleep modes
z Programming and debug interfaces
z JTAG (IEEE 1149.1 compliant) interface, including boundary scan
z PDI (Program and Debug Interface)
z I/O and packages
z 78 Programmable I/O pins
z 100 lead TQFP
z 100 ball BGA
z 100 ball VFBGA
z Operating voltage
z 1.6 – 3.6V
z Operating frequency
z 0 – 12MHz from 1.6V
z 0 – 32MHz from 2.7V
Atmel-8385I-AVR-ATxmega64A1U-128A1U-Datasheet–09/2014
1 page  
3. Overview
The Atmel AVR XMEGA is a family of low power, high performance, and peripheral rich 8/16-bit microcontrollers based
on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the AVR XMEGA devices
achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system
designer to optimize power consumption versus processing speed.
The Atmel AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32 registers are
directly connected to the arithmetic logic unit (ALU), allowing two independent registers to be accessed in a single
instruction, executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs
many times faster than conventional single-accumulator or CISC based microcontrollers.
The AVR XMEGA A1U devices provide the following features: in-system programmable flash with read-while-write
capabilities; internal EEPROM and SRAM; four-channel DMA controller, eight-channel event system and programmable
multilevel interrupt controller, 78 general purpose I/O lines, 16-bit real-time counter (RTC); eight flexible, 16-bit
timer/counters with compare and PWM channels, eight USARTs; four two-wire serial interfaces (TWIs); one full speed
USB 2.0 interface; four serial peripheral interfaces (SPIs); AES and DES cryptographic engine; CRC-16 (CRC-CCITT)
and CRC-32 (IEEE 802.3) generator; two 16-channel, 12-bit ADCs with programmable gain; two 2-channel, 12-bit DACs;
four Analog Comparators (ACs) with window mode; programmable watchdog timer with separate internal oscillator;
accurate internal oscillators with PLL and prescaler; and programmable brown-out detection.
The program and debug interface (PDI), a fast, two-pin interface for programming and debugging, is available. The
devices also have an IEEE std. 1149.1 compliant JTAG interface, and this can also be used for boundary scan, on-chip
debug and programming.
The XMEGA A1U devices have five software selectable power saving modes. The idle mode stops the CPU while
allowing the SRAM, DMA controller, event system, interrupt controller, and all peripherals to continue functioning. The
power-down mode saves the SRAM and register contents, but stops the oscillators, disabling all other functions until the
next TWI, USB resume, or pin-change interrupt, or reset. In power-save mode, the asynchronous real-time counter
continues to run, allowing the application to maintain a timer base while the rest of the device is sleeping. In standby
mode, the external crystal oscillator keeps running while the rest of the device is sleeping. This allows very fast startup
from the external crystal, combined with low power consumption. In extended standby mode, both the main oscillator and
the asynchronous timer continue to run. To further reduce power consumption, the peripheral clock to each individual
peripheral can optionally be stopped in active mode and idle sleep mode.
Atmel offers a free QTouch library for embedding capacitive touch buttons, sliders and wheels functionality into AVR
microcontrollers.
The device are manufactured using Atmel high-density, nonvolatile memory technology. The program flash memory can
be reprogrammed in-system through the PDI or JTAG interfaces. A boot loader running in the device can use any
interface to download the application program to the flash memory. The boot loader software in the boot flash section will
continue to run while the application flash section is updated, providing true read-while-write operation. By combining an
8/16-bit RISC CPU with in-system, self-programmable flash, the AVR XMEGA is a powerful microcontroller family that
provides a highly flexible and cost effective solution for many embedded applications.
All Atmel AVR XMEGA devices are supported with a full suite of program and system development tools, including C
compilers, macro assemblers, program debugger/simulators, programmers, and evaluation kits.
XMEGA A1U [DATASHEET]
Atmel-8385I-AVR-ATxmega64A1U-128A1U-Datasheet–09/2014
5
5 Page 
Six of the 32 registers can be used as three 16-bit address register pointers for data space addressing, enabling efficient
address calculations. One of these address pointers can also be used as an address pointer for lookup tables in flash
program memory.
7. Memories
7.1 Features
z Flash program memory
z One linear address space
z In-system programmable
z Self-programming and boot loader support
z Application section for application code
z Application table section for application code or data storage
z Boot section for application code or boot loader code
z Separate read/write protection lock bits for all sections
z Built in fast CRC check of a selectable flash program memory section
z Data memory
z One linear address space
z Single-cycle access from CPU
z SRAM
z EEPROM
z Byte and page accessible
z Optional memory mapping for direct load and store
z I/O memory
z Configuration and status registers for all peripherals and modules
z 16 bit-accessible general purpose register for global variables or flags
z External memory support
z SRAM
z SDRAM
z Memory mapped external hardware
z Bus arbitration
z Deterministic priority handling between CPU, DMA controller, and other bus masters
z Separate buses for SRAM, EEPROM, I/O memory and external memory
z Simultaneous bus access for CPU and DMA controller
z Production signature row memory for factory programmed data
z ID for each microcontroller device type
z Serial number for each device
z Calibration bytes for factory calibrated peripherals
z User signature row
z One flash page in size
z Can be read and written from software
z Content is kept after chip erase
7.2 Overview
The Atmel AVR architecture has two main memory spaces, the program memory and the data memory. Executable code
can reside only in the program memory, while data can be stored in the program memory and the data memory. The data
memory includes the internal SRAM, and EEPROM for nonvolatile data storage. All memory spaces are linear and
require no memory bank switching. Nonvolatile memory (NVM) spaces can be locked for further write and read/write
operations. This prevents unrestricted access to the application software.
A separate memory section contains the fuse bytes. These are used for configuring important system functions, and can
only be written by an external programmer.
XMEGA A1U [DATASHEET]
Atmel-8385I-AVR-ATxmega64A1U-128A1U-Datasheet–09/2014
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ATxmega64A1U.PDF ] | |
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