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PDF IN90S2313DW Data sheet ( Hoja de datos )
| Número de pieza | IN90S2313DW | |
| Descripción | 8-BIT MICROCONTROLLER | |
| Fabricantes | Integral | |
| Logotipo |  |
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IN90S2313DW
8-BIT MICROCONTROLLER WITH 2K BYTES BUILD-IN
PROGRAMMABLE FLASH
Description
The IN90S2313DW is a low-power CMOS 8-bit
microcontroller based on the AVR enhanced RISC
architecture additionally equipped by EEPROM & analog
comparators .
IC are purposed for usage in consumer devices,
telecommunications, industrial control, transport and
others.
Functionally ICs is compatible to AT90S2313
(ATMEL).
ICs is assembled in SO-20 package MS-013AC.
Functions & features:
- Up to 1 MIPS performance ( 1 million instructions per second) for 1MHz clock;
- Programm memory 2K bytes (not less 1000 Write/Erase Cycles );
- Data memory on the base of 128 byte static RAM;
- Data memory on the base of 128 byte EEPROM(not less 100000 Write/Erase Cycles );
- Programming Lock for Program and Data Security;
- 2 mode of serial programming are available:parallel by means of programmer & serial
(direct) by means of Serial Interface;
- Few types of synchronization: external clock external resonator (piezoceramic or
quartz);
- Low Power Idle and Power Down Modes;
- Supply voltage UCC =2.7 … 6.0 В;
- Clock frequency fС up to 10 MHz;
- Operating temperature range -40 … +85°C.
ИНТЕГР АЛ
1
1 page  
IN90S2313DW
Instruction Set Summary
Logic instructions
N Mnemonics Descriptrion
1 AND Rd, Rr Logical AND Registers
2 ANDI Rd, K Logical AND Register and Constant
3 EOR Rd, Rr Exclusive OR Registers
4 OR Rd, Rr
Logical OR Registers
5 ORI Rd, K
Logical OR Register and Constant
6 COM Rd
One’s Complement
7 NEG Rd
Two’s Complement
8 CLR Rd
9 SER Rd
10 TST Rd
11 SWAP Rd
Clear Register
Set Register
Test for Zero or Minus
Swap Nibbles in GPR
Operation
Rd Rd Rr
Rd Rd K
Rd Rd Rr
Rd Rd Rr
Rd Rd K
Rd $FF - Rd
Rd $00 - Rd
Rd Rd Rd
Rd $FF
Rd Rd
Rd (3..0) Rd (7..4),
Rd (7..4) Rd (3..0)
Clock
1
1
1
1
1
1
1
1
1
1
1
Arithmetic instructions
N Mnemonics Descriptrion
1 ADD Rd, Rr Add two Registers
Operation
Rd Rd + Rr
Clock
1
2 ADC Rd, Rr Add with Carry two Registers
Rd Rd + Rr + C
1
3 ADIW Rd, K Add Immediate to Word
4 SUB Rd, Rr Subtract two Registers
Rdh:Rdl Rdh:Rdl + K 2
Rd Rd - Rr
1
5 SUBI Rd, K Subtract Constant from Register
Rd Rd - K
1
6 SBC Rd, Rr Subtract with Carry two Registers
Rd Rd - Rr - C
1
7 SBCI Rd, K Subtract with Carry Constant from Reg. Rd Rd - K - C
1
8 SBIW Rd, K Subtract Immediate from Word
9 DEC Rd
Decrement of GPR
10 INC Rd
Increment of GPR
11 ASR Rd
Arithmetic Shift Right
12 LSL Rd
13 LSR Rd
14 ROL Rd
Logical Shift Left
Logical Shift Right
Rotate Left Through Carry
15 ROR Rd
Rotate Right Through Carry
Rdh:Rdl Rdh:Rdl - K
Rd Rd - 1
Rd Rd + 1
Rd (n) Rd (n+1),
n = 0..6,
Rd(7) Rd(7)
Rd (n+1) Rd (n),
Rd(0) 0
Rd (n) Rd (n+1),
Rd(7) 0
Rd(0) C,
Rd (n+1) Rd (n),
C Rd (7)
Rd(7) C,
Rd (n) Rd (n+1),
C Rd (0)
2
1
1
1
1
1
1
1
Flags
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,C,N,V,S
Z,C,N,V,H,
S
Z,N,V,S
—
Z,N,V,S
—
Flags
Z,C,N,V,H,
S
Z,C,N,V,H,
S
Z,C,N,V,S
Z,C,N,V,H,
S
Z,C,N,V,H,
S
Z,C,N,V,H,
S
Z,C,N,V,H,
S
Z,C,N,V,S
Z,N,V,S
Z,N,V,S
Z,C,N,V,S
Z,C,N,V,H,
S
Z,C,N,V,S
Z,C,N,V,H,
S
Z,C,N,V,S
ИНТЕГР АЛ
5
5 Page 
Hardware Reset
Watchdog timer Reset
IN90S2313DW
ИНТЕГР АЛ
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet IN90S2313DW.PDF ] | |
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