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PDF PL671-00 Data sheet ( Hoja de datos )
| Número de pieza | PL671-00 | |
| Descripción | Programmable Spread Spectrum Clock | |
| Fabricantes | PLL | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PL671-00 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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PicoEMITM Programmable Spread Spectrum Clock
FEATURES
Advanced programmable Spread Spectrum clock
generator with 16 modulation steps to choose from
Programmable SST Modulation Magnitude:
o Center Spread: ±0.125% to ±2.0% in ±0.125% steps
o Down Spread: -0.25% to -4.0% in 0.25% steps
Input Frequency Range:
o Fundamental Crystal: 10MHz to 40MHz
Output Frequency Range:
o 1MHz to 200MHz @ 3.3V operation
o 1MHz to 166MHz @ 2.5V operation
Programmable Output Drive (4mA, 8mA, 16mA)
Low Cycle to Cycle jitter, 100pS
Single 2.5V to 3.3V, ± 10% power supply
Available in Die form
DESCRIPTION
The PL671-00 is an advanced programmable Spread
Spectrum clock generator (PSSCG), and a member of
PhaseLink’s PicoPLL Programmable Clock family.
The PL671-00 clock outputs can be programmed up to
200MHz (3.3V) or 166MHz (2.5V), and has 16 modulation
magnitudes (±0.125 to ±2.0% or -0.25 to -4.0%) to choose
from for use in Center or Down Spread modulation
applications. In addition, 2 configuration pins can be
programmed to allow cycling the device through 4 pre-
programmed states*. The option of being able to turn
‘ON/OFF’ the Spread Spectrum modulation allows for
completing a design with PL671-00 and having the assurance
of turning ‘ON’ the EMI modulation if EMI becomes an issue*.
The PL671-00’s spread spectrum modulation greatly
reduces the fundamental and harmonic frequencies’
peak magnitude, reducing the system level
electromagnetic radiation by as much as 20dB.
*Note: Requires 6-pad package
PAD CONFIGURATION
0.80mm
XIN XOUT
OE^, PDB^,
CLK1
CSEL1^
VDD
CSEL0^, CLK2
GND
CLK0
Note: ^ denotes internal pull up resistor
BLOCK DIAGRAM
DIE SPECIFICATION
Parameter
Chip size
Chip thickness
PAD size
Chip base
XIN
XOUT
Xtal
FREF
Osc
Modulation Magnitude*
PDB
CLK[0:2]
CSEL[0:1]
SST On/Off
* Optional Pre-defined
Modulation Magnitude Control
R-Counter
9-bits
M-Counter
11-bits
P-Counter
6-bits
Odd/Even
/1, /2
÷8 Phase
Detector
÷8
Charge
Pump
FVCO = FREF * (M/R)
FOUT = FVCO / P
Loop
Filter
Value
1.40mm x 0.80mm
150 to 250µm
90µm x 90 µm
GND level
SST
Modulation
VCO
CLK1/PDB
CLK0
Programmable Function
/1, /2, /4
CLK2/CSEL0
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 12/22/08 Page 1
1 page  
PicoEMITM Programmable Spread Spectrum Clock
AC SPECIFICATIONS (Continued)
PARAMETERS
CONDITIONS
Duty Cycle
At VDD /2
Cycle to Cycle Jitter*
TCYC-CYC Over output frequency range @ 3.3V
* Note: Jitter performance depends on the programming parameters.
MIN TYP
45 50
DC SPECIFICATIONS
PARAMETERS
Supply Current, Dynamic,
with Loaded Outputs
Operating Voltage
Power Supply Ramp
Output Low Voltage
Output High Voltage
Output Current, Low Drive
Output Current, Std Drive
Output Current, High Drive
SYMBOL
CONDITIONS
MIN
IDD 27MHz, 3.3V, load=15pF, (PDB=1)
PDB=0
VDD
tPU
Time for VDD to reach 90% VDD.
Power ramp must be monotonic.
VOL IOL = +4mA (Std Drive)
2.25
VOH IOH = -4mA (Std Drive)
VDD - 0.4
IOSD VOL = 0.4V, VOH = 2.4V
4
IOSD VOL = 0.4V, VOH = 2.4V
8
IOHD VOL = 0.4V, VOH = 2.4V
16
TYP
MAX UNITS
55 %
100 ps
MAX UNITS
15 mA
10 A
3.63 V
100 ms
0.4 V
V
mA
mA
mA
CRYSTAL SPECIFICATIONS
PARAMETERS
Fundamental Crystal Resonator Frequency
Crystal Loading Rating
Maximum Sustainable Drive Level
Operating Drive Level
High C0
Shunt Capacitance
ESR Max
Low C0
Shunt Capacitance
ESR Max
SYMBOL MIN TYP MAX UNITS
FXIN
CL (xtal)
10
C0
ESR
C0
ESR
40 MHz
14 pF
100 W
30 W
5.5 pF
50 Ω
2.5 pF
80 Ω
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 12/22/08 Page 5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet PL671-00.PDF ] | |
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