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PDF PH4025L Data sheet ( Hoja de datos )
| Número de pieza | PH4025L | |
| Descripción | N-channel TrenchMOS logic level FET | |
| Fabricantes | NXP Semiconductors | |
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PH4025L
N-channel TrenchMOS logic level FET
Rev. 01 — 22 August 2007
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology.
1.2 Features
I Logic level threshold
I Optimized for use in DC-to-DC
converters
I 100 % RG tested
1.3 Applications
I DC-to-DC converters
I Voltage regulators
I Lead-free package
I Very low switching and conduction
losses
I 100 % ruggedness tested
I Switched-mode power supplies
I PC Motherboards
1.4 Quick reference data
I VDS ≤ 25 V
I RDSon ≤ 4.0 mΩ
I ID ≤ 99 A
I QGD = 5 nC (typ)
2. Pinning information
Table 1. Pinning
Pin Description
1, 2, 3 source (S)
4 gate (G)
mb mounting base; connected to drain (D)
Simplified outline
mb
1234
SOT669 (LFPAK)
Symbol
D
G
mbb076 S
1 page  
NXP Semiconductors
PH4025L
N-channel TrenchMOS logic level FET
6. Characteristics
Table 5. Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Static characteristics
V(BR)DSS drain-source breakdown
voltage
VGS(th) gate-source threshold voltage
IDSS drain leakage current
IGSS
RG
RDSon
gate leakage current
gate resistance
drain-source on-state
resistance
Dynamic characteristics
ID = 250 µA; VGS = 0 V
Tj = 25 °C
Tj = −55 °C
ID = 1 mA; VDS = VGS; see Figure 9 and 10
Tj = 25 °C
Tj = 150 °C
Tj = −55 °C
VDS = 25 V; VGS = 0 V
Tj = 25 °C
Tj = 150 °C
VGS = ±16 V; VDS = 0 V
f = 1 MHz
VGS = 10 V; ID = 25 A; see Figure 6 and 8
Tj = 25 °C
Tj = 150 °C
VGS = 4.5 V; ID = 25 A; see Figure 6 and 8
QG(tot)
QGS
total gate charge
gate-source charge
ID = 25 A; VDS = 12 V; VGS = 4.5 V;
see Figure 11 and 12
QGS1 pre-VGS(th) gate-source charge
QGS2 post-VGS(th) gate-source charge
QGD
gate-drain charge
VGS(pl) gate-source plateau voltage
QG(tot) total gate charge
ID = 0 A; VDS = 0 V; VGS = 4.5 V
Ciss input capacitance
Coss output capacitance
VGS = 0 V; VDS =12 V; f = 1 MHz;
see Figure 14
Crss reverse transfer capacitance
Ciss input capacitance
VGS = 0 V; VDS = 0 V; f = 1 MHz
td(on)
tr
turn-on delay time
rise time
VDS =12 V; RL = 0.5 Ω; VGS = 4.5 V;
RG = 5.6 Ω
td(off)
turn-off delay time
tf fall time
Source-drain diode
VSD source-drain voltage
trr reverse recovery time
Qr recovered charge
IS = 25 A; VGS = 0 V; see Figure 13
IS = 25 A; dIS/dt = −100 A/µs; VGS = 0 V;
VR = 20 V
Min Typ Max Unit
25 - - V
22.5 - - V
1.3 1.7 2.15 V
0.8 - - V
- - 2.6 V
- - 1 µA
- - 100 µA
- - 100 nA
- 0.48 - Ω
- 3.4 4.0 mΩ
- 5.4 6.4 mΩ
- 5.1 6.2 mΩ
- 21.3 - nC
- 8.8 - nC
- 5.3 - nC
- 3.4 - nC
- 5 - nC
- 2.8 - V
- 1.35 - nC
- 2601 - pF
- 645 - pF
- 287 - pF
- 2973 - pF
- 28.3 - ns
- 52 - ns
- 35 - ns
- 24 - ns
- 0.8 1.3 V
- 38 - ns
- 11 - nC
PH4025L_1
Product data sheet
Rev. 01 — 22 August 2007
© NXP B.V. 2007. All rights reserved.
5 of 12
5 Page 
NXP Semiconductors
PH4025L
N-channel TrenchMOS logic level FET
9. Legal information
9.1 Data sheet status
Document status[1][2]
Product status[3]
Objective [short] data sheet Development
Preliminary [short] data sheet Qualification
Product [short] data sheet
Production
Definition
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
9.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
9.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
PH4025L_1
Product data sheet
Rev. 01 — 22 August 2007
© NXP B.V. 2007. All rights reserved.
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