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PDF CP2104 Data sheet ( Hoja de datos )
| Número de pieza | CP2104 | |
| Descripción | SINGLE-CHIP USB-TO-UART BRIDGE | |
| Fabricantes | Silicon Laboratories | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CP2104 (archivo pdf) en la parte inferior de esta página. Total 22 Páginas | ||
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CP2104
SINGLE-CHIP USB-TO-UART BRIDGE
Single-Chip USB to UART Data Transfer
Integrated USB transceiver; no external resistors
required
Integrated clock; no external crystal required
Integrated 1024-Byte One-Time Programmable ROM
for customizable product information
On-chip power-on reset circuit
On-chip voltage regulator: 3.45 V output
USB Function Controller
USB Specification 2.0 compliant; full-speed (12 Mbps)
USB Suspend states supported via SUSPEND and
SUSPEND pins
Asynchronous Serial Data BUS (UART)
All handshaking and modem interface signals
Data formats supported:
- Data bits: 5, 6, 7, and 8
- Stop bits: 1, 1.5, and 2
- Parity: odd, even, mark, space, no parity
Baud rates: 300 bps to 2 Mbits
576 byte receive buffer; 576 byte transmit buffer
Hardware or X-On/X-Off handshaking supported
Four GPIO signals for status and control
Configurable I/O (1.8 V to VDD) using VIO pin
Configurable I/O (VDD to 5 V) using external pull-up
RS-485 mode with bus transceiver control
Virtual COM Port Device Drivers
Works with Existing COM Port PC Applications
Royalty-Free Distribution License
Windows 7®/Vista®/XP®/Server 2003®/2000®
Mac® OS-X
Linux®
USBXpress™ Direct Driver Support
Royalty-Free Distribution License
Windows 7/Vista/XP/Server 2003/2000
Windows CE® 6.0, 5.0, and 4.2
Example Applications
Upgrade of RS-232 legacy devices to USB
Upgrade of RS-485 legacy devices to USB
Cellular phone USB interface cable
PDA USB interface cable
USB to RS-232 serial adapter
Supply Voltage
Self-powered: 3.0 to 3.6 V
USB bus powered: 4.0 to 5.25 V
I/O voltage: 1.8 V to VDD
Package
RoHS-compliant 24-pin QFN (4x4 mm)
Ordering Part Number
CP2104-F03-GM
Temperature Range: –40 to +85 °C
External
voltage supply
or direct
connection
to VDD
USB
CONNECTOR
VBUS
D-
D+
GND
Rev. 1.1 11/13
VIO
REGIN
VDD
GND
VBUS
D-
D+
VPP
IN Voltage
Regulator
OUT
CP2104
4
48 MHz
Oscillator
USB
Transceiver
USB Function
Controller
1024B
PROM
576B 576B
TX RX
Buffer Buffer
UART
Figure 1. Example System Diagram
GPIO.0
GPIO.1
GPIO.2
GPIO.3
RST
SUSPEND
SUSPEND
RI
DCD
DTR
DSR
TXD
RXD
RTS
CTS
Copyright © 2013 by Silicon Laboratories
(to external circuitry
for status and
control)
(to external circuitry
for USB suspend
states)
External RS-232
transceiver or
UART circuitry
CP2104
1 page  
CP2104
2. Electrical Characteristics
Table 1. Absolute Maximum Ratings
Parameter
Conditions
Min Typ Max Units
Ambient Temperature Under Bias
–55 — 125 °C
Storage Temperature
–65 — 150 °C
Voltage on RST, GPIO or UART Pin with respect to
GND
VIO > 2.2 V
VIO < 2.2 V
–0.3
–0.3
— 5.8
— VIO +
3.6
V
Voltage on VBUS with respect to GND
VDD > 3.0 V
VDD not powered
–0.3
–0.3
— 5.8
V
— VDD +
3.6
Voltage on VDD or VIO with respect to GND
–0.3 —
4.2
V
Maximum Total Current through VDD, VIO, and GND
— — 500 mA
Maximum Output Current Sunk by RST or any I/O
pin
— — 100 mA
Note: Stresses above those listed may cause permanent damage to the device. This is a stress rating only, and functional
operation of the devices at or exceeding the conditions in the operation listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods may affect device reliability.
Table 2. Global DC Electrical Characteristics
VDD = 3.0 to 3.6 V, –40 to +85 °C unless otherwise specified.
Parameter
Conditions
Min Typ Max Units
Digital Supply Voltage (VDD)
Digital Port I/O Supply Voltage (VIO)
Voltage on VPP with respect to GND during a
ROM programming operation
VIO > 3.3 V
3.0
1.8
5.75
— 3.6
— VDD
— VIO +
3.6
V
V
V
Capacitor on VPP for ROM programming
Supply Current1
Supply Current1
Supply Current—USB Pull-up2
— 4.7 — µF
Normal Operation;
—
17.0 18.5
mA
VREG Enabled
Suspended;
VREG Enabled
— 100 200 µA
— 200 228 µA
Specified Operating Temperature Range
–40 — +85 °C
Notes:
1. If the device is connected to the USB bus, the USB Pull-up Current should be added to the supply current for total
supply current.
2. The USB Pull-up supply current values are calculated values based on USB specifications.
Rev. 1.1
5
5 Page 
CP2104
Figure 4. QFN-24 Recommended PCB Land Pattern
Table 9. QFN-24 PCB Land Pattern Dimensions
Dimension
Min
Max
Dimension
Min
C1 3.90 4.00
C2 3.90 4.00
E 0.50 BSC
X1 0.20 0.30
X2 2.70
Y1 0.65
Y2 2.70
Notes:
General
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
Max
2.80
0.75
2.80
Solder Mask Design
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
mask and the metal pad is to be 60 m minimum, all the way around the pad.
Stencil Design
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
7. A 2x2 array of 1.10 mm x 1.10 mm openings on a 1.30 mm pitch should be used for the center
pad.
Card Assembly
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
Body Components.
Rev. 1.1
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet CP2104.PDF ] | |
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