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PDF NL3HS644 Data sheet ( Hoja de datos )
| Número de pieza | NL3HS644 | |
| Descripción | 2:1 MIPI D-PHY (1.5 Gbps) 4-Data Lane Switch | |
| Fabricantes | ON Semiconductor | |
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NL3HS644
2:1 MIPI D-PHY (1.5 Gbps)
4-Data Lane Switch
The NL3HS644 is a 4−data lane MIPI, D−PHY switch. This
single−pole double−throw (SPDT) switch is optimized for switching
between 2 high−speed or low−power MIPI sources. The NL3HS644 is
designed for MIPI specifications and allows connection to a CSI or
DSI module.
Features
• Operating Supply: VCC = 1.65 V to 4.5 V
• Switch Signal Range: 0 to VCC
• Signal Types: MIPI, D−PHY
• ON−Resistance:
RON = 8 W (Typ) HS MIPI
RON = 7.9 W (Typ) LP MIPI
• ON−Resistance Mismatch:
DRON = 0.09 W (Typ) HS MIPI
DRON = 0.17 W (Typ) LP MIPI
• ON Resistance Flatness:
RON_FLAT = 0.03 W (Typ) HS MIPI
RON_FLAT = 0.46 W (Typ) LP MIPI
• Supply Current: ICC = 55 mA (Max)
• Hi−Z Supply Current: ICCZ = 5 mA (Max)
• Off−Isolation: OIRR = −27 dB (Typ)
• Crosstalk: XTALK = −28 dB (Typ)
• Bandwidth: BW = 1,050 MHz (Typ)
• Channel to Channel Skew: tSK = 63 ps (Typ)
• ON Capacitance: CON = 12.6 pF
• 36−Ball WLCSP Package, 2.36 mm x 2.36 mm
• This device is Pb−Free, Halogen−Free/BFR−Free and are
RoHS−Compliant
www.onsemi.com
WLCSP36
FC SUFFIX
CASE 567LR
MARKING DIAGRAM
XXXXXX
AWLYWW
G
XXXXXX = Device Code
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 8 of this data sheet.
Figure 1. Typical Application – Mobile Phone
© Semiconductor Components Industries, LLC, 2015
November, 2015 − Rev. 2
1
Publication Order Number:
NL3HS644/D
1 page  
NL3HS644
AC ELECTRICAL CHARACTERISTICS All typical values are for VCC = 3.3 V at TA = 25°C unless otherwise specified.
TA = −40°C to +85°C
Symbol
Parameter
Condition
VCC (V)
Min Typ Max
tINIT Initialization Time
RL = 50 W, CL = 5 pF, VIS = 1.2 V 2.5 to 4.5
100
VCC to Output (Notes 4, 5)
Figure 4
1.8 150
tEN Enable Turn−On Time
RL = 50 W, CL = 5 pF, VIS = 1.2 V 2.5 to 4.5
120 200
OE to Output
Figure 5
1.8 250 500
tDIS Disable Turn−Off Time
OE to Output
RL = 50 W, CL = 5 pF, VIS = 1.2 V
Figure 5
2.5 to 4.5
1.8
25 50
50 90
tON Turn−On Time
SEL to Output
RL = 50 W, CL = 5 pF, VIS = 1.2 V
Figure 5
2.5 to 4.5
1.8
50 100
75 125
tOFF
Turn−Off Time
SEL to Output
RL = 50 W, CL = 5 pF, VIS = 1.2 V
Figure 5
2.5 to 4.5
1.8
50 200
200 325
tBBM
Break−Before−Make Time
RL = 50 W, CL = 5 pF, VIS = 1.2 V
Figure 6
10 50
OIRR
Off−Isolation for MIPI (Note 4) RL = 50 W, f = 750 MHz, OE =
VCC, VIS = −1 dBm (200 mVPP)
1.65 to 4.5
−27
XTALK
Crosstalk for MIPI (Note 4)
RL = 50 W, f = 750 MHz,
VIS = −1 dBm (200 mVPP)
1.65 to 4.5
−28
BW −3 dB Bandwidth (Note 4)
RL = 50 W, CL = 0 pF
3.0 900 1050
SDD21
Differential Data Rate
Inter−Operability Data Rate
3.0
1.5
4. Guaranteed by characterization.
5. Wait time required after VCC power−up to operating level before data access is valid.
HIGH SPEED−RELATED AC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
tSK(O)
Channel−to−Channel
Single−Ended Skew (Note 6)
tSK(P)
Skew of Opposite Transitions
of the Same Output (Note 6)
6. Guaranteed by characterization.
Condition
TDR−Based Method
(VIS = 0.2 VPP, CL = CON) Figure 7
TDR−Based Method
(VIS = 0.2 VPP, CL = CON) Figure 8
VCC (V)
3.3
TA = −40°C to +85°C
Min Typ Max
63 67
3.3 17 31
CAPACITANCE
Symbol
CIN
CON
COFF
Parameter
Control Pin Input Capacitance
Out ON Capacitance
Out OFF Capacitance
Condition
VCC = 0 V, f = 1 MHz
VCC = 3.3 V, OE = 0 V, f = 1 MHz
VCC = 3.3 V, OE = 3.3 V, f = 1 MHz
VCC (V)
3.3
3.3
3.3
TA = −40°C to +85°C
Min Typ Max
14.9
12.6
7.4
Unit
ms
ms
ns
ns
ns
ns
dB
dB
MHz
Gbps
Unit
ps
ps
Unit
pF
pF
pF
www.onsemi.com
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