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PDF MTD2N40E Data sheet ( Hoja de datos )
| Número de pieza | MTD2N40E | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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MTD2N40E
Preferred Device
Power MOSFET
2 Amps, 400 Volts
N−Channel DPAK
This high voltage MOSFET uses an advanced termination scheme
to provide enhanced voltage−blocking capability without degrading
performance over time. In addition this advanced high voltage
MOSFET is designed to withstand high energy in the avalanche and
commutation modes. The energy efficient design also offers a
drain−to−source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Replaces MTD1N40E
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value
Drain−Source Voltage
VDSS
400
Drain−Gate Voltage (RGS = 1.0 MΩ)
VDGR
400
Gate−Source Voltage
− Continuous
− Non−Repetitive (tp ≤ 10 ms)
VGS
VGSM
± 20
± 40
Drain Current − Continuous @ TC = 25°C
Drain Current − Continuous @ 100°C
Drain Current − Single Pulse (tp ≤ 10 μs)
ID
ID
IDM
2.0
1.5
6.0
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Total Power Dissipation @ TC = 25°C,
when mounted to minimum
recommended pad size
PD 40
0.32
1.75
Operating and Storage Temperature
Range
TJ, Tstg
−55 to
150
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc,
IL = 3.0 Apk, L = 10 mH, RG = 25 Ω)
Thermal Resistance
− Junction to Case
− Junction to Ambient
− Junction to Ambient, when mounted to
minimum recommended pad size
EAS
RθJC
RθJA
RθJA
45
3.13
100
71.4
Maximum Temperature for Soldering
Purposes, 1/8″ from case for 10
seconds
TL 260
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
http://onsemi.com
2 AMPERES
400 VOLTS
RDS(on) = 3.5 Ω
N−Channel
D
G
S
MARKING
DIAGRAM
4
12
3
Y
WW
T
CASE 369A
DPAK
STYLE 2
= Year
= Work Week
= MOSFET
YWW
T
2N40E
PIN ASSIGNMENT
4
Drain
1 23
Gate Drain Source
ORDERING INFORMATION
Device
Package
Shipping
MTD2N40E
DPAK
75 Units/Rail
MTD2N40ET4
DPAK
2500 Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2006
August, 2006 − Rev. 2
1
Publication Order Number:
MTD2N40E/D
1 page  
MTD2N40E
12 400
10 QT
8 VGS 300
6
Q1
Q2
200
4
TJ = 25°C 100
2 ID = 2 A
0 Q3
VDS
0
02
46
8
QT, TOTAL CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
100 TJ = 25°C
ID = 2 A
VDD = 200 V
VGS = 10 V
td(off)
10 tf
tr
td(on)
1
1 10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
2
VGS = 0 V
TJ = 25°C
1.5
100
1
0.5
0
0.5 0.6 0.7 0.8 0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define the
maximum simultaneous drain−to−source voltage and drain
current that a transistor can handle safely when it is forward
biased. Curves are based upon maximum peak junction
temperature and a case temperature (TC) of 25°C. Peak
repetitive pulsed power limits are determined by using the
thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance−General
Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 μs. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) − TC)/(RθJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
http://onsemi.com
5
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| PDF Descargar | [ Datasheet MTD2N40E.PDF ] | |
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