MTD6P10E Datasheet PDF - ON Semiconductor
| Part Number | MTD6P10E | |
| Description | Power MOSFET ( Transistor ) | |
| Manufacturers | ON Semiconductor | |
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MTD6P10E
Preferred Device
Power MOSFET
6 Amps, 100 Volts
P−Channel DPAK
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. The energy efficient design also
offers a drain−to−source diode with a fast recovery time. Designed for
low voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
Features
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Pb−Free Packages are Available
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 1.0 MW)
Gate−to−Source Voltage
− Continuous
− Non−repetitive (tp ≤ 10 ms)
Drain Current
− Continuous
− Continuous @ 100°C
− Single Pulse (tp ≤ 10 ms)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C (Note 2)
Operating and Storage Temperature Range
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
TJ, Tstg
100 Vdc
100 Vdc
± 15 Vdc
± 20 Vpk
6.0
3.9
18
50
0.4
1.75
−55 to
150
Adc
Apk
W
W/°C
W
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc,
IL = 6.0 Apk, L = 10 mH, RG = 25 W)
EAS 180 mJ
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
RqJC
RRqqJJAA
°C/W
2.50
100
71.4
Maximum Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
2. When surface mounted to an FR−4 board using the 0.5 sq.in. drain pad size.
http://onsemi.com
V(BR)DSS
100 V
RDS(on) TYP
660 mW
ID MAX
6.0 A
P−Channel
D
G
S
MARKING DIAGRAM & PIN ASSIGNMENTS
4
12
3
DPAK
CASE 369C
STYLE 2
Gate 1
Drain 2
YWW
T6
P10EG
Source 3
4
Drain
Y
WW
T6P10E
G
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping†
MTD6P10E
DPAK
75 Units/Rail
MTD6P10EG
DPAK
(Pb−Free)
75 Units/Rail
MTD6P10ET4
DPAK
2500 Tape & Reel
MTD6P10ET4G
DPAK
2500 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2006
August, 2006 − Rev. 5
1
Publication Order Number:
MTD6P10E/D
|
| |
 
MTD6P10E
12
10
Q1
8
QT
Q2
VGS
90 1000
VDD = 50 V
75 ID = 6 A
VGS = 10 V
60 100 TJ = 25°C
6 45
4 ID = 6 A 30
TJ = 25°C
2 15
Q3 VDS
00
0 2 4 6 8 10 12 14 16
QT, TOTAL CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
tr
td(off)
10 td(on)
tf
1
1 10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
6
VGS = 0 V
5 TJ = 25°C
4
3
2
1
0
0.50 0.75 1.0 1.25 1.50 1.75
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
2.0
Figure 10. Diode Forward Voltage versus Current
100
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define the
maximum simultaneous drain−to−source voltage and drain
current that a transistor can handle safely when it is forward
biased. Curves are based upon maximum peak junction
temperature and a case temperature (TC) of 25°C. Peak
repetitive pulsed power limits are determined by using the
thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance−General
Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 ms. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) − TC)/(RqJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
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| Information | Total 7 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ MTD6P10E.PDF Datasheet ] | |
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