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PDF NTH4302 Data sheet ( Hoja de datos )
| Número de pieza | NTH4302 | |
| Descripción | HD3e Quad N-Channel | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NTH4302
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HD3e Quad N−Channel
The NTH4302 is the first integrated Quad FET in a single package.
It is the integration of 4 planar TMOS devices. It uses the latest HD3e
TMOS technology from ON Semiconductor, with very high cell
density and improved switching capability
The NTH4302 is a 16-pin leadless device packaged in the new
PInPAKt from ON Semiconductor. The PInPAK is a new flexible
power package that uses the MAP process. The NTH4302 uses the
same MOSFET as the NTD60N02R. However, with the PInPAK
package, various other pairs of MOSFETs can be used to create
additional custom applications.
Features
• Ultra Low RDS(on) Provides Higher Efficiency
• Very Fast Switching due to Planar Technology and Leadless Package
• 200% Footprint Reduction Compared to Similar DPAK Solution for
the Same Power
• Up to 80 Amp per FET
• Very Low Vf (0.8 mV) Ideal for Synchronous Rectification
• Specifically Designed for DC-DC Buck Converter in VRM9.1
Application (80 Amp Per Phase, 500 khz)
Application
• DC-DC Converter
• Motherboard/Server Buck Converter
• Telecom/Industrial Power Supply
• Automotive Motor Drive
• H-Bridge
Application Note AND8086/D, “Board Mounting Notes for Quad Flat-Pack
No-Lead Package (QFN)”, is available on our web site www.onsemi.com.
http://onsemi.com
QUAD TMOS POWER MOSFET
40 AMPERES
24 VOLTS
RDS(on) = 7.5 mW
Ciss = 2050 pF
RqJC = 1.3 5C/W
MARKING
DIAGRAM
TBD
CASE TBD
PInPAK
xx = Specific Device Code
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
PINOUT DIAGRAM
TBD
ORDERING INFORMATION
Device
Package
NTH4301
ONiPAK
Shipping
TBD
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2003
January, 2003 - Rev. 0
1
Publication Order Number:
NTH4301/D
1 page  
NTH4302
2000
Ciss VDS = 0 V VGS = 0 V
1600
TJ = 25°C
10
8
1200
800 Crss
400
0
-10 -5 0 5
VGS VDS
Ciss
Coss
Crss
10 15
6 QT
Q1
4
Q2
2
0
20 0 4 8
VGS
ID = 30 A
TJ = 25°C
12 16
GATE-T O-SOURCE OR DRAIN-TO-SOURCE VOLTAGE
(V)
Figure 8. Capacitance Variation
Qg, TOTAL GATE CHARGE (nC)
Figure 9. Gate-to-Source and Drain-to-Source
Voltage versus Total Charge
1000
100
10
VDS = 10 V
ID = 30 A
VGS = 10 V
tr
td(off)
tf
td(on)
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 10. Resistive Switching Time Variation
versus Gate Resistance
60
50
40
30
20
10
TJ = 150°C
TJ = 25°C
0
0
0.2 0.4 0.6 0.8
1
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 11. Diode Forward Voltage versus
Current
http://onsemi.com
5
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| PDF Descargar | [ Datasheet NTH4302.PDF ] | |
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