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PDF ESD5101 Data sheet ( Hoja de datos )
| Número de pieza | ESD5101 | |
| Descripción | ESD Protection Diode | |
| Fabricantes | ON Semiconductor | |
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ESD5101, ESD5111
ESD Protection Diodes
Micro−packaged Diodes for ESD
Protection
The ESD51x1 Series is designed to protect voltage sensitive
components from ESD. Excellent clamping capability, low leakage,
and fast response time provide best in class protection on designs that
are exposed to ESD. Because of its small size, it is suited for use in
smartphone, smart-watch, or many other portable / wearable
applications where board space comes at a premium.
Features
• Low Capacitance (5 pF Max, I/O to GND)
• Small Body Outline Dimensions
♦ 01005 Size: 0.435 x 0.23 mm
♦ 0201 Size: 0.6 x 0.3 mm
• Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4)
• Low ESD Clamping Voltage
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Operating Junction Temperature Range TJ −55 to +125 °C
Storage Temperature Range
Tstg − 55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds)
TL 260 °C
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)
ESD
ESD
±15 kV
±15 kV
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
See Application Note AND8308/D for further description of
survivability specs.
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
www.onsemi.com
MARKING
DIAGRAMS
ESD5101 (01005)
DSN2
CASE 152AK
L
ESD5101P (01005)
DSN2
CASE TBD*
X
ESD5111 (0201)
WLCSP2
CASE 567AV
ESD5111P (0201)
WLCSP2
CASE TBD*
L, E, X = Device Code
M = Date Code
* In Development
EM
XM
PIN CONFIGURATION
AND SCHEMATIC
12
=
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 2
1
Publication Order Number:
ESD5101/D
1 page  
ESD5101, ESD5111
IEC 61000−4−2 Spec.
Level
First Peak
Test Volt- Current Current at
age (kV)
(A) 30 ns (A)
1 2 7.5 4
2 4 15 8
3 6 22.5 12
48
30 16
Current at
60 ns (A)
2
4
6
8
IEC61000−4−2 Waveform
Ipeak
100%
90%
I @ 30 ns
I @ 60 ns
10%
Figure 13. IEC61000−4−2 Spec
tP = 0.7 ns to 1 ns
Transmission Line Pulse (TLP) Measurement
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 14. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 15 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels.
L
50 W Coax
Cable
S Attenuator
÷
50 W Coax
Cable
10 MW
IM VM
VC DUT
Oscilloscope
Figure 14. Simplified Schematic of a Typical TLP
System
Figure 15. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
www.onsemi.com
5
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| PDF Descargar | [ Datasheet ESD5101.PDF ] | |
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