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Número de pieza BLF10H6600P
Descripción Power LDMOS transistor
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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BLF10H6600P; BLF10H6600PS
Power LDMOS transistor
Rev. 2 — 20 June 2013
Product data sheet
1. Product profile
1.1 General description
A 600 W LDMOS RF power transistor for transmitter applications and industrial
applications. The excellent ruggedness of this device makes it ideal for digital and analog
transmitter applications.
Table 1. Application information
Test signal
f
(MHz)
PL(AV)
(W)
PL(M)
(W)
Gp D IMD3
(dB) (%) (dBc)
RF performance in a common source 860 MHz narrowband test circuit
2-tone, class-AB
pulsed, class-AB
f1 = 860; f2 = 860.1
860
250 -
20.8 46 32
- 600 19.8 58 -
1.2 Features and benefits
Excellent ruggedness (VSWR 40 : 1 through all phases)
Optimum thermal behavior and reliability, Rth(j-c) = 0.15 K/W
High power gain
High efficiency
Designed for broadband operation (400 MHz to 1000 MHz)
Internal input matching for high gain and optimum broadband operation
Excellent reliability
Easy power control
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
Communication transmitter applications
Industrial applications

1 page




BLF10H6600P pdf
NXP Semiconductors
BLF10H6600P; BLF10H6600PS
Power LDMOS transistor
7.2 Impedance information
Table 9. Typical push-pull impedance
Simulated Zi and ZL device impedance; impedance info at VDS = 50 V and
PL(AV) = 600 W (pulsed CW). See Figure 2 for definition of transistor impedance.
f Zi
ZL
MHz
300 0.607 + j0
5.495 + j1.936
325 0.622 j1.441
5.324 + j2.008
350 0.639 j1.121
5.151 + j2.065
375 0.658 j0.826
4.977 + j2.107
400 0.679 j0.551
4.805 + j2.136
425 0.703 j0.291
4.634 + j2.153
450 0.73 j0.044
4.466 + j2.157
475 0.76 + j0.194
4.301 + j2.151
500 0.793 + j0.424
4.14 + j2.134
525 0.83 + j0.648
3.984 + j2.109
550 0.872 + j0.869
3.833 + j2.075
575 0.919 + j1.088
3.687 + j2.033
600 0.972 + j1.305
3.546 + j1.985
625 1.032 + j1.523
3.411 + j1.931
650 1.101 + j1.741
3.281 + j1.871
675 1.179 + j1.963
3.156 + j1.807
700 1.268 + j2.187
3.036 + j1.738
725 1.371 + j2.416
2.922 + j1.666
750 1.49 + j2.651
2.813 + j1.591
775 1.629 + j2.891
2.708 + j1.512
800 1.792 + j3.138
2.609 + j1.432
825 1.984 + j3.39
2.514 + j1.349
850 2.212 + j3.649
2.423 + j1.264
875 2.484 + j3.91
2.336 + j1.178
900 2.812 + j4.17
2.254 + j1.091
925 3.209 + j4.421
2.175 + j1.003
950 3.689 + j4.648
2.1 + j0.913
975 4.27 + j4.829
2.029 + j0.823
1000
4.967 + j4.927
1.96 + j0.733
BLF10H6600P_BLF10H6600PS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 June 2013
© NXP B.V. 2013. All rights reserved.
5 of 18

5 Page





BLF10H6600P arduino
NXP Semiconductors
BLF10H6600P; BLF10H6600PS
Power LDMOS transistor

Ș'




DDD






*S
G%

*S

Ș'

DDD 
Ș'





       
3/ :



      
3/ :
VDS = 50 V; f = 860 MHz; tp = 100 s; = 20 %.
(1) IDq = 100 mA
(2) IDq = 200 mA
(3) IDq = 600 mA
(4) IDq = 1000 mA
(5) IDq = 1300 mA
Fig 8. Drain efficiency as a function of output power;
typical values
VDS = 50 V; IDq = 1300 mA; f = 860 MHz; tp = 100 s;
= 20 %.
Fig 9. Power gain and drain efficiency as function of
output power; typical values

*S
G%

DDD

Ș'


DDD



 
 
  





      
3/ :
IDq = 1300 mA; f = 860 MHz; tp = 100 s; = 20 %.
(1) VDS = 50 V
(2) VDS = 45 V
(3) VDS = 40 V
(4) VDS = 35 V
(5) VDS = 30 V
Fig 10. Power gain as a function of output power;
typical values


       
3/ :
IDq = 1300 mA; f = 860 MHz; tp = 100 s; = 20 %.
(1) VDS = 50 V
(2) VDS = 45 V
(3) VDS = 40 V
(4) VDS = 35 V
(5) VDS = 30 V
Fig 11. Drain efficiency as a function of output power;
typical values
BLF10H6600P_BLF10H6600PS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 June 2013
© NXP B.V. 2013. All rights reserved.
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