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PDF ICS8312 Data sheet ( Hoja de datos )

Número de pieza ICS8312
Descripción 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER
Fabricantes Integrated Device Technology 
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No Preview Available ! ICS8312 Hoja de datos, Descripción, Manual

LOW SKEW, 1-TO-12 LVCMOS/LVTTL
FANOUT BUFFER
General Description
The ICS8312 is a low skew, 1-to-12 LVCMOS/
ICS LVTTL Fanout Buffer and a member of the
HiPerClockS™ HiPerClockS™ family of High Performance Clock
Solutions from IDT. The ICS8312 single-ended clock
input accepts LVCMOS or LVTTL input levels. The
low impedance LVCMOS outputs are designed to drive 50series
or parallel terminated transmission lines. The effective fanout can
be increased from 12 to 24 by utilizing the ability of the outputs to
drive two series terminated lines.
The ICS8312 is characterized at full 3.3V, 2.5V, and 1.8V, mixed
3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply
modes. Guaranteed output and part-to-part skew characteristics
along with the 1.8V output capabilities makes the ICS8312 ideal
for high performance, single ended applications that also require a
limited output voltage.
ICS8312
Features
Twelve LVCMOS/LVTTL outputs
CLK input supports the following input types: LVCMOS, LVTTL
Maximum output frequency: 250MHz
Output skew: 150ps (maximum)
Supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
1.8V/1.8V
0°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Block Diagram
CLK_EN Pullup
D
Q
LE
CLK Pulldown
OE Pullup
12
Q[0:11]
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER
1
Pin Assignment
GND
VDD
CLK_EN
CLK
GND
OE
VDD
GND
32 31 30 29 28 27 26 25
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 10 11 12 13 14 15 16
Q4
VDDO
Q5
GND
Q6
VDDO
Q7
GND
ICS8312
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
ICS8312AY REV. D JULY 3, 2008

1 page




ICS8312 pdf
ICS8312
LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER
Table 4D. Power Supply DC Characteristics, VDD = 3.3V ± 5%, VDDO = 2.5V ± 5%, TA = 0°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical Maximum
VDD
VDDO
IDD
IDDO
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
3.135
2.375
3.3 3.465
2.5 2.625
10
10
Units
V
V
mA
mA
Table 4E. Power Supply DC Characteristics, VDD = 3.3V ± 5%, VDDO = 1.8V ±0.2V, TA = 0°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical Maximum
VDD
VDDO
IDD
IDDO
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
3.135
1.6
3.3 3.465
1.8 2.0
10
10
Units
V
V
mA
mA
Table 4F. Power Supply DC Characteristics, VDD = 2.5V ± 5%, VDDO = 1.8V ±0.2V, TA = 0°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical Maximum
VDD
VDDO
IDD
IDDO
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
2.375
1.6
2.5 2.625
1.8 2.0
10
10
Units
V
V
mA
mA
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER
5
ICS8312AY REV. D JULY 3, 2008

5 Page





ICS8312 arduino
ICS8312
LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER
Parameter Measurement Information
1.65V±5%
VDD,
VDDO
LVCMOS
GND
SCOPE
Qx
-1.65V±5%
3.3V Core/3.3V LVCMOS Output Load AC Test Circuit
0.9V±0.1V
VDD,
VDDO
LVCMOS
GND
SCOPE
Qx
-0.9V±0.1V
1.8V Core/1.8V LVCMOS Output Load AC Test Circuit
2.4V±0.9V
0.9V±0.1V
VDD
VDDO
LVCMOS
GND
SCOPE
Qx
-0.9V±0.1V
VDDO
2
3.3V Core/1.8V LVCMOS Output Load AC Test Circuit
1.25V±5%
VDD,
VDDO
LVCMOS
GND
-1.25V±5%
SCOPE
Qx
2.5V Core/2.5V LVCMOS Output Load AC Test Circuit
2.05V±5%
1.25V±5%
VDD
VDDO
LVCMOS
GND
SCOPE
Qx
-1.25V±5%
VDDO
2
3.3V Core/2.5V LVCMOS Output Load AC Test Circuit
1.6V±5%
0.9V±0.1V
VDD
VDDO
LVCMOS
GND
SCOPE
Qx
-0.9V±0.1V
VDDO
2
2.5V Core/1.8V LVCMOS Output Load AC Test Circuit
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER
11
ICS8312AY REV. D JULY 3, 2008

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