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PDF MTP2P50EG Data sheet ( Hoja de datos )
| Número de pieza | MTP2P50EG | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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MTP2P50EG
Power MOSFET
2 Amps, 500 Volts, P−Channel TO−220
This high voltage MOSFET uses an advanced termination scheme
to provide enhanced voltage−blocking capability without degrading
performance over time. In addition, this Power MOSFET is designed
to withstand high energy in the avalanche and commutation modes.
The energy efficient design also offers a drain−to−source diode with a
fast recovery time. Designed for high voltage, high speed switching
applications in power supplies, converters and PWM motor controls,
these devices are particularly well suited for bridge circuits where
diode speed and commutating safe operating areas are critical and
offer additional safety margin against unexpected voltage transients.
Features
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• This is a Pb−Free Device*
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain−Source Voltage
Drain−Gate Voltage (RGS = 1.0 MW)
Gate−Source Voltage
− Continuous
− Non−Repetitive (tp ≤ 10 ms)
Drain Current − Continuous
Drain Current − Continuous @ 100°C
Drain Current − Single Pulse (tp ≤ 10 ms)
Total Power Dissipation
Derate above 25°C
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
500 Vdc
500 Vdc
± 20 Vdc
± 40 Vpk
2.0 Adc
1.6
6.0 Apk
75 W
0.6 W/°C
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc,
IL = 4.0 Apk, L = 10 mH, RG = 25 W)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 sec
TJ, Tstg −55 to 150
EAS 80
°C
mJ
RqJC
RqJA
TL
°C/W
1.67
62.5
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
www.onsemi.com
2 AMPERES, 500 VOLTS
RDS(on) = 6 W
P−Channel
D
G
S
MARKING DIAGRAM
AND PIN ASSIGNMENT
4
4 Drain
1
2
3
TO−220AB
CASE 221A
STYLE 5
MTP
2P50EG
AYWW
1
Gate
2
Drain
3
Source
MTP2P50E = Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
Device
MTP2P50EG
Package
TO−220AB
(Pb−Free)
Shipping
50 Units/Rail
© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. 7
1
Publication Order Number:
MTP2P50E/D
1 page  
MTP2P50EG
12
10
8
Q1
6
4
QT
Q2
VGS
ID = 2 A
TJ = 25°C
300
250
200
150
100
1000
VDD = 250 V
ID = 2 A
VGS = 10 V
TJ = 25°C
100
td(off)
tf
2 50
Q3 VDS
00
02 4
6 8 10 12 14 16 18 20
QT, TOTAL CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
tr td(on)
10
1 10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
2
VGS = 0 V
1.6 TJ = 25°C
100
1.2
0.8
0.4
0
0.6 0.8 1
1.2 1.4 1.6 1.8 2 2.2 2.4
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define the
maximum simultaneous drain−to−source voltage and drain
current that a transistor can handle safely when it is forward
biased. Curves are based upon maximum peak junction
temperature and a case temperature (TC) of 25°C. Peak
repetitive pulsed power limits are determined by using the
thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance−General
Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 ms. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) − TC)/(RqJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
www.onsemi.com
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