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Número de pieza | IKCM15L60HD | |
Descripción | Control Integrated POwer System | |
Fabricantes | Infineon | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de IKCM15L60HD (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
No Preview Available ! Control Integrated POwer System
(CIPOS™)
IKCM15L60HD
Datasheet
Datasheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
<Revision 2.2>
<2016-08-01>
1 page Control Integrated POwer System (CIPOS™)
IKCM15L60HD
Pin Assignment
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Pin Name
VS(U)
VB(U)
VS(V)
VB(V)
VS(W)
VB(W)
HIN(U)
HIN(V)
HIN(W)
LIN(U)
LIN(V)
LIN(W)
VDD
VFO
ITRIP
VSS
NW
NV
NU
W
V
U
P
NC
Pin Description
U-phase high side floating IC supply offset voltage
U-phase high side floating IC supply voltage
V-phase high side floating IC supply offset voltage
V-phase high side floating IC supply voltage
W-phase high side floating IC supply offset voltage
W-phase high side floating IC supply voltage
U-phase high side gate driver input
V-phase high side gate driver input
W-phase high side gate driver input
U-phase low side gate driver input
V-phase low side gate driver input
W-phase low side gate driver input
Low side control supply
Fault output
Over current shutdown input
Low side control negative supply
W-phase low side emitter
V-phase low side emitter
U-phase low side emitter
Motor W-phase output
Motor V-phase output
Motor U-phase output
Positive bus input voltage
No Connection
Pin Description
HIN(U, V, W) and LIN(U, V, W) (Low side and high
side control pins, Pin 7 - 12)
These pins are positive logic and they are
responsible for the control of the integrated IGBT.
The Schmitt-trigger input thresholds of them are
such to guarantee LSTTL and CMOS compatibility
down to 3.3V controller outputs. Pull-down resistor
of about 5k is internally provided to pre-bias
inputs during supply start-up and a zener clamp is
provided for pin protection purposes. Input
Schmitt-trigger and noise filter provide beneficial
noise rejection to short input pulses.
HINx
LINx
VSS
5k
CIPOSTM
Schmitt-Trigger
INPUT NOISE
FILTER
UZ=10.5V
SWITCH LEVEL
VIH; VIL
Figure 3 Input pin structure
a)
HIN
LIN
tFILIN
b)
HIN
LIN
tFILIN
The noise filter suppresses control pulses which are
below the filter time tFILIN. The filter acts according
to Figure 4.
HO
LO
Figure 4
high
HO
low LO
Input filter timing diagram
Datasheet
5 <Revision 2.2>
<2016-08-01>
5 Page Control Integrated POwer System (CIPOS™)
IKCM15L60HD
Mechanical Characteristics and Ratings
Description
Mounting torque
Flatness
Weight
Condition
M3 screw and washer
Refer to Figure 7
min
0.49
-50
-
Value
typ
-
-
6.58
max Unit
0.78 Nm
100 µm
-g
Figure 7 Flatness measurement position
Switching Times Definition
HINx
LINx
0.9V
toff
iCx
90%
tf
vCEx
10%
tc(off)
Figure 8 Switching times definition
10%
2.1V
ton
90%
trr
10%
10%
tr
tc(on)
10%
Datasheet
11 <Revision 2.2>
<2016-08-01>
11 Page |
Páginas | Total 16 Páginas | |
PDF Descargar | [ Datasheet IKCM15L60HD.PDF ] |
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