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PDF ESD11B Data sheet ( Hoja de datos )
| Número de pieza | ESD11B | |
| Descripción | TVS Diode ( Rectifier ) | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ESD11B (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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ESD11B
Transient Voltage
Suppressors
Micro−Packaged Diodes for ESD Protection
The ESD11B Series is designed to protect voltage sensitive
components from ESD. Excellent clamping capability, low leakage,
and fast response time provide best in class protection on designs that
are exposed to ESD. Because of its small size, it is suited for use in
cellular phones, MP3 players, digital cameras and many other portable
applications where board space comes at a premium.
Specification Features
• Low Capacitance 12 pF
• Low Clamping Voltage
• Small Body Outline Dimensions: 0.60 mm x 0.30 mm
• Low Body Height: 0.3 mm
• Stand−off Voltage: 5.0 V
• Low Leakage
• Response Time is < 1 ns
• IEC61000−4−2 Level 4 ESD Protection
• IEC61000−4−4 Level 4 EFT Protection
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Mechanical Characteristics
MOUNTING POSITION: Any
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
Device Meets MSL 3 Requirements
MAXIMUM RATINGS
Rating
IEC 61000−4−2 (ESD)
Symbol
Contact
Air
Value
±15
±15
Unit
kV
Total Power Dissipation on FR−5 Board
(Note 1) @ TA = 25°C
Thermal Resistance, Junction−to−Ambient
Junction and Storage Temperature Range
Lead Solder Temperature − Maximum
(10 Second Duration)
°PD°
RqJA
TJ, Tstg
TL
250 mW
400 °C/W
−40 to +125 °C
260 °C
Peak Pulse Current, 8 x 20 ms double Ipp 2.0 A
exponential waveform (Figure 5)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
www.onsemi.com
DSN2
CASE 152AA
MARKING
DIAGRAM
PIN 1
XXXX
YYY
XXXX = Specific Device Code
YYY = Year Code
ORDERING INFORMATION
Device
Package
Shipping†
ESD11B5.0ST5G DSN2 5000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
See Application Note AND8308/D for further description of survivability specs.
© Semiconductor Components Industries, LLC, 2015
September, 2015 − Rev. 7
1
Publication Order Number:
ESD11B/D
1 page  
ESD11B
It is imperative that the coating is conformal, uniform, and
free of impurities to insure a consistent mounting process.
Due to the package’s extremely small size, we only
recommend the use of the electroless nickel/ immersion gold
metallization over the copper pads.
PCB Circuit Trace Width
The width of the PCB circuit trace plays an important role
in the reduction of component tilting when the solder is
reflowed. A solderable circuit trace allows the solder to wick
or run down the trace, reducing the overall thickness of the
solder on the PCB and under the component. Due to the
small nature of the solder pad and component, the solder on
the PCB will tend to form a bump causing the component to
slide down the side of that solder bump resulting in a tilted
component on the PCB. Allowing the solder to wick or run
down the PCB circuit trace, will reduce the solder thickness
and in turn prevent the solder from forming a ball on the PCB
pad. This was observed during ON Semiconductor board
mounting evaluations. The best results to prevent tilting
used a PCB circuit trace equal to the width of the mounting
pad. The length of the solder wicking or run out is controlled
by the solder mask opening.
Solder Type
Solder pastes such as Cookson Electronics’ WS3060 with
a Type 4 or smaller sphere size are recommended. WS3060
has a water-soluble flux for cleaning. Cookson Electronics’
PNC0106A can be used if a no-clean flux is preferred.
Solder Stencil Screening
Stencil screening of the solder paste onto the PCB is
commonly used in the industry. The recommended stencil
thickness for this part is 0.1 mm (0.004 in). The sidewalls of
the stencil openings should be tapered approximately five
degrees along with an electro-polish finish to aid in the
release of the paste when the stencil is removed from the
PCB. See Figure 9 for the recommended stencil opening size
and pitch shown on the recommended PCB mounting pads
and solder mask opening from Figure 6.
A second stencil option is shown in Figure 10. This option
increases the amount of solder paste applied to the PCB
through the stencil. This second option increases the stencil
opening size and pitch. The PCB mounting pads and solder
mask opening on the board do not change from the
recommendations in Figure 6.
Figure 10. Maximum Stencil Pattern
Note: If the maximum stencil opening option from
Figure 10 is used, tilt may occur on some of the packages.
This was evident in the board mounting study we conducted.
The stencil with the largest openings may improve solder
release from the stencil along with slightly increasing the
package shear strength.
Package Placement
Due to the small package size and because the pads are on
the underside of the package, an automated pick and place
procedure with magnification is recommended. A dual
image optical system where the underside of the package can
be aligned to the PCB should be used. Pick and place
equipment with a standard tolerance of +/- 0.05 mm (0.002
in) or better is recommended. The package self aligns during
the reflow process due to the surface tension of the solder.
Figure 9. Recommended Stencil Pattern.
www.onsemi.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet ESD11B.PDF ] | |
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