|
|
PDF IS61LV6416L Data sheet ( Hoja de datos )
| Número de pieza | IS61LV6416L | |
| Descripción | 64K x 16 HIGH-SPEED CMOS STATIC RAM | |
| Fabricantes | ISSI | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de IS61LV6416L (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
|
No Preview Available !
IS61LV6416
IS61LV6416L
64K x 16 HIGH-SPEED CMOS STATIC RAM
WITH 3.3V SUPPLY
ISSI®
NOVEMBER 2005
FEATURES
• High-speed access time: 8, 10, 12 ns
• CMOS low power operation
— 61LV6416:
75 mW (typical) operating current
0.5 mW (typical) standby current
— 61LV6416L:
65 mW (typical) operating current
50 µW (typical) standby current
• TTL compatible interface levels
• Single 3.3V power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Lead-free available
DESCRIPTION
The ISSI IS61LV6416/IS61LV6416L is a high-speed,
1,048,576-bit static RAM organized as 65,536 words by 16
bits. It is fabricated using ISSI's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields access times
as fast as 8 ns with low power consumption.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip
Enable and Output Enable inputs, CE and OE. The active
LOW Write Enable (WE) controls both writing and reading
of the memory. A data byte allows Upper Byte (UB) and
Lower Byte (LB) access.
The IS61LV6416/IS61LV6416L is packaged in the JEDEC
standard 44-pin 400-mil SOJ, 44-pin TSOP-II, and 48-pin
mini BGA (6mm x 8mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A15
DECODER
64K x 16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
CONTROL
CIRCUIT
UB
LB
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc.
Rev. I
11/22/05
1
1 page  
IS61LV6416
IS61LV6416L
ISSI ®
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1a and 1b
1
2
AC TEST LOADS
3.3V
319 Ω
OUTPUT
30 pF
Including
jig and
scope
Figure 1a.
353 Ω
3.3V
319 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 1b.
353 Ω
3
4
5
6
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
-8 ns
Min. Max.
-10 ns
Min. Max.
-12 ns
Min. Max.
Unit
tRC Read Cycle Time
8—
10 —
12 —
ns
tAA Address Access Time
—8
— 10
— 12
ns
tOHA Output Hold Time
3—
3—
3—
ns
tACE CE Access Time
—8
— 10
— 12
ns
tDOE OE Access Time
—5
—5
—6
ns
tHZOE(2)
OE to High-Z Output
—5
—5
—6
ns
tLZOE(2)
OE to Low-Z Output
0—
0—
0—
ns
tHZCE(2
CE to High-Z Output
04
05
06
ns
tLZCE(2)
CE to Low-Z Output
3—
3—
3—
ns
tBA LB, UB Access Time
—6
—6
—6
ns
tHZB LB, UB to High-Z Output
04
05
06
ns
tLZB LB, UB to Low-Z Output
0—
0—
0—
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
7
8
9
10
11
12
Integrated Silicon Solution, Inc.
Rev. I
11/22/05
5
5 Page 
IS61LV6416
IS61LV6416L
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol
VDR
IDR
Parameter
VDD for Data Retention
Data Retention Current
Test Condition
See Data Retention Waveform
VDD = 2.0V, CE ≥ VDD – 0.2V
tSDR Data Retention Setup Time See Data Retention Waveform
tRDR Recovery Time
See Data Retention Waveform
Note 1: Typical values are measured at VDD = 3.0V, TA = 25OC and not 100% tested.
Options
IS61LV6416
IS61LV6416L
ISSI ®
Min. Typ.(1) Max. Unit
12.0 — 3.6 V
— 0.5 10 mA
— 0.05 1.5
20 — — ns
tRC — — ns
3
DATA RETENTION WAVEFORM (CE Controlled)
VDD
VDR
CE
GND
tSDR Data Retention Mode
CE ≥ VDD - 0.2V
tRDR
4
5
6
7
8
9
10
11
12
Integrated Silicon Solution, Inc.
Rev. I
11/22/05
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet IS61LV6416L.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| IS61LV6416 | 64K X 16 HIGH SPEED CMOS STATIC RAM WITH 3.3 V SUPPLY |  ETC |
| IS61LV6416 | 64K x 16 HIGH-SPEED CMOS STATIC RAM | ISSI |
| IS61LV6416-10 | 64K X 16 HIGH SPEED CMOS STATIC RAM WITH 3.3 V SUPPLY | ETC |
| IS61LV6416-10B | 64K X 16 HIGH SPEED CMOS STATIC RAM WITH 3.3 V SUPPLY | ETC |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |