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PDF X9317 Data sheet ( Hoja de datos )
| Número de pieza | X9317 | |
| Descripción | Digitally Controlled Potentiometer | |
| Fabricantes | Intersil | |
| Logotipo |  |
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DATASHEET
Low Noise, Low Power, 100 Taps, Digitally Controlled
Potentiometer (XDCP™)
X9317
The Intersil X9317 is a digitally controlled potentiometer
(XDCP™). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The wiper
position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 99 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs. The
position of the wiper can be stored in nonvolatile memory and
then be recalled upon a subsequent power-up operation.
The device can be used as a three-terminal potentiometer for
voltage control or as a two-terminal variable resistor for current
control in a wide variety of applications.
Applications
• LCD bias control
• DC bias adjustment
• Gain and offset trim
• Laser diode bias control
• Voltage regulator output control
Features
• Solid-state potentiometer
• 3-wire serial up/down interface
• 100 wiper tap points
- Wiper position stored in nonvolatile memory and recalled
on power-up
• 99 resistive elements
- Temperature compensated
- End-to-end resistance range ±20%
• Low power CMOS
- VCC = 2.7V to 5.5V, and 5V ±10%
- Standby current <5µA
• High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
• RTOTAL values = 10kΩ, 50kΩ, 100kΩ
• Packages
- 8 Ld SOIC, TSSOP, and MSOP
• Pb-free (RoHS compliant)
VCC (SUPPLY VOLTAGE)
UP/DOWN
(U/D)
INCREMENT
(INC)
DEVICE SELECT
(CS)
CONTROL
AND
MEMORY
VSS (GROUND)
GENERAL
U/D
INC
CS
RH
RW
RL
VCC
VSS
UP/DOWN
COUNTER
7-BIT
NONVOLATILE
MEMORY
STORE AND
RECALL
CONTROL
CIRCUITRY
99
98
97
ONE 96
OF
ONE
HUNDRED
DECODER
2
1
0
WIPER
RESISTOR
SWITCHES
ARRAY
FIGURE 1. BLOCK DIAGRAM
DETAILED
RH
RL
RW
November 4, 2014
FN8183.9
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2004, 2005, 2008, 2009, 2012, 2014. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
X9317
DC Electrical Specifications VCC = 5V ±10%. Boldface limits apply across the operating temperature range, -40°C to +85°C
(Industrial) and 0°C to +70°C (Commercial).
SYMBOL
PARAMETER
TEST CONDITIONS
MIN TYP MAX
(Note 13) (Note 9) (Note 13) UNIT
ICC1 VCC Active Current (Increment)
ICC2 VCC Active Current (Store)
(non-volatile write)
ISB Standby Supply Current
ILI CS, INC, U/D Input Leakage Current
VIH CS, INC, U/D Input HIGH Voltage
VIL CS, INC, U/D Input LOW Voltage
CIN (Note 10) CS, INC, U/D Input Capacitance
CS = VIL, U/D = VIL or VIH and INC = VIL/VIH at
min. tCYC
RL, RH, RW not connected
80 µA
CS = VIH, U/D = VIL or VIH and INC = VIL or VIH.
RL, RH, RW not connected
400 µA
CS VIH, U/D and INC = VIL
RL, RH, RW not connected
5 µA
VIN = VSS to VCC
-10 +10 µA
VCC x 0.7
VCC + 0.5 V
-0.5 VCC x 0.1 V
VCC = 5V, VIN = VSS, TA = +25°C, f = 1MHz
10 pF
Endurance and Data Retention VCC = 5V ±10%, TA = Full Operating Temperature Range.
PARAMETER
MIN
Minimum Endurance
100,000
Data Retention
100
UNIT
Data changes per bit
Years
Test Circuit
TEST POINT
RW
FORCE
CURRENT
Equivalent Circuit
RTOTAL
RH
RL
CH
CW CL
10pF
10pF
25pF
RW
AC Conditions of Test
Input pulse levels
Input rise and fall times
Input reference levels
0V to 3V
10ns
1.5V
AC Electrical Specifications VCC = 5V ±10%. Boldface limits apply across the operating temperature range, -40°C to +85°C
(Industrial) and 0°C to +70°C (Commercial).
SYMBOL
PARAMETER
MIN
(Note 13)
TYP
(Note 9)
MAX
(Note 13)
UNIT
tCl
tlD (Note 10)
tDI (Note 10)
tlL
tlH
tlC
tCPHS
tCPHNS
(Note 10)
CS to INC Setup
INC HIGH to U/D Change
U/D to INC Setup
INC LOW Period
INC HIGH Period
INC Inactive to CS Inactive
CS Deselect Time (STORE)
CS Deselect Time (NO STORE)
50
100
1
960
960
1
10
100
ns
ns
µs
ns
ns
µs
ms
ns
tIW INC to RW Change
tCYC INC Cycle Time
1 5 µs
2 µs
Submit Document Feedback
5
FN8183.9
November 4, 2014
5 Page 
X9317
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 7/11
5
3.0±0.05
A
8
D
1.10 MAX
3.0±0.05 4.9±0.15
5
PIN# 1 ID
12
B
0.65 BSC
TOP VIEW
H
0.25 - 0.36
0.08 M C A-B D
SIDE VIEW 1
0.85±010
C
SEATING PLANE
0.10 ± 0.05
0.10 C
DETAIL "X"
SIDE VIEW 2
0.09 - 0.20
0.95 REF
GAUGE
PLANE
0.25
0.55 ± 0.15
DETAIL "X"
3°±3°
(5.80)
(4.40)
(3.00)
(0.65)
(1.40)
(0.40)
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
Submit Document Feedback 11
FN8183.9
November 4, 2014
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet X9317.PDF ] | |
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