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Número de pieza | P2V64S40ETP | |
Descripción | 64Mb Synchronous DRAM | |
Fabricantes | Deutron Electronics | |
Logotipo | ||
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No Preview Available ! 64Mb Synchronous DRAM Specification
P2V64S40ETP
Deutron Electronics Corp.
8F, 68, SEC. 3, NANKING E. RD., TAIPEI 104,
TAIWAN, R. O. C.
TEL : 886-2-2517-7768
FAX : 886-2-2517-4575
http: // www.deutron.com.tw
1 page 64Mb Synchronous DRAM
P2V64S40ETP (4-bank x 1,048,576-word x 16-bit)
DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -25 to 85°C for Extended, 0 to 70°C for Commercial)
Parameter
Symbol
Test Condition
Version
-5 -6 -7
Unit
Note
Operating Current
(One Bank Active)
Burst length = 1
ICC1
tRC ≧ tRC(min)
IO = 0 mA
80 70 60 mA 1
Precharge Standby Current in
power-down mode
ICC2P
ICC2PS
CKE ≦ VIL(max), tCC = 10ns
CKE & CLK ≦ VIL(max), tCC = ∞
222
mA
111
CKE ≧ VIH(min), CS ≧ VIH(min), tCC = 10ns
ICC2N Input signals are changed one time during 10 10 10
Precharge Standby Current
in non power-down mode
20ns
mA
ICC2NS
CKE ≧ VIH(min), CLK ≦ VIL(max), tCC = ∞
Input signals are stable
15
15
15
Active Standby Current
in power-down mode
ICC3P
ICC3PS
CKE ≦ VIL(max), tCC = 10ns
CKE & CLK ≦ VIL(max), tCC = ∞
10 10 10 mA
10 10 10
Active Standby Current
in non power-down mode
(One Bank Active)
CKE ≧ VIH(min), CS ≧ VIH(min), tCC = 10ns
ICC3N Input signals are changed one time during 30 25 20
20ns
mA
ICC3NS
CKE ≧ VIH(min), CLK ≦ VIL(max), tCC = ∞
Input signals are stable
10
10
10
Operating Current
(Burst Mode)
IO = 0 mA
ICC4
Page burst
4Banks Activated
tCCD = 2CLKs
Refresh Current
Self Refresh Current
ICC5
ICC6
tARFC ≧ tARFC(min)
CKE ≦ 0.2V
NOTES:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
100 90
80 mA 1
150 130 110 mA 2
1.5 1.5 1.5 mA
Aug. 2005
Page- 4
Rev. 1.1
5 Page 64Mb Synchronous DRAM
P2V64S40ETP (4-bank x 1,048,576-word x 16-bit)
Current state
Precharging
Row activating
Write
recovering
Write
recovering with
auto precharge
Refresh
Mode register
accessing
/CS
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
/RAS
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
/CAS
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
/WE
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
/Address
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC,BA
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC,BA
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC,BA1=L
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC,BA1=L
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC,BA1=L
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
MODE
Command
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS/EMRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS / EMRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS / EMRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS / EMRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS / EMRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS
Action
Nop → Enter idle after tRP
Nop → Enter idle after tRP
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop → Enter idle after tRP
ILLEGAL
ILLEGAL
Nop → Enter bank active after tRCD
Nop → Enter bank active after tRCD
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop → Enter row active after tDPL
Nop → Enter row active after tDPL
Nop → Enter row active after tDPL
Begin read
Begin new write
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop → Enter precharge after tDPL
Nop → Enter precharge after tDPL
Nop → Enter precharge after tDPL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop → Enter idle after tRC1
Nop → Enter idle after tRC1
Nop → Enter idle after tRC1
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop → Enter idle after tRSC
Nop → Enter idle after tRSC
Nop → Enter idle after tRSC
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Notes
1
1
1
1
1
1,7
1
5
1
1
1,5
1
1
Aug. 2005
Page- 10
Rev. 1.1
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet P2V64S40ETP.PDF ] |
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