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PDF AWB7125 Data sheet ( Hoja de datos )

Número de pieza AWB7125
Descripción Small-Cell Power Amplifier Module
Fabricantes ANADIGICS 
Logotipo ANADIGICS Logotipo



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No Preview Available ! AWB7125 Hoja de datos, Descripción, Manual

FEATURES
InGaP HBT Technology
-47 dBc ACPR @ + 10 MHz, +24.5 dBm
30 dB Gain
High Efficiency
Low Transistor Junction Temperature
Internally matched for a 50 System
Low Profile Miniature Surface Mount Package;
Halogen Free and RoHS Compliant
Multi-Carrier Capability
APPLICATIONS
LTE, WCDMA and HSDPA Air Interfaces
Picocell, Femtocell, Home Nodes
Customer Premises Equipment (CPE)
Data Cards and Terminals
AWB7125
860 MHz to 894 MHz
Small-Cell Power Amplifier Module
PRELIMINARY DATA SHEET - Rev 1.1
14 Pin 7 mm x 7 mm x 1.3 mm
Surface Mount Module
PRODUCT DESCRIPTION
The AWB7125 is a highly linear, fully matched, power
amplifier module designed for picocell, femtocell, and
customer premises equipment (CPE) applications.
Its high power efficiency and low adjacent channel
power levels meet the extremely demanding needs
of small cell infrastructure architectures. Designed for
LTE, WCDMA, HSDPA air interfaces operating in the
860 MHz to 894 MHz band, the AWB7125 delivers
up to +24.5 dBm of LTE (E-TM1.1) power with an
ACPR of -47 dBc. It operates from a convenient
+4.2 V supply and provides 30 dB of gain. The
device is manufactured using an advanced InGaP
HBT MMIC technology offering state-of-the-art
reliability, temperature stability, and ruggedness.
The self-contained 7 mm x 7 mm x 1.3 mm surface
mount package incorporates RF matching networks
optimized for output power, efficiency, and linearity in
a 50 Ω system.
Vcc1 Vcc2
RF Input
Matching
Network
Bias
Network
Matching
Network
Power
Detector
Vref Detector
Output
Figure 1: Block Diagram
01/2013
RF Output

1 page




AWB7125 pdf
AWB7125
APPLICATION INFORMATION
To ensure proper performance, refer to all related
Application Notes on the ANADIGICS web site:
http://www.anadigics.com
Shutdown Mode
The power amplifier may be placed in a shutdown
mode by applying logic low levels (see Operating
Ranges table) to the VREF voltage.
VRE F
C15 C11
0.1 µF
1000 pF
Vcc1C1* C2* C3
C4
100 µF 10 µF 0.1µF 1000 pF
RFI N
VDET
R2
100 K
C6
0.1µF
4.7 K
R1
1VRE F
GND 2
GND 3
Vcc1
RFI N
4
5
GND 6
7VDET
* Optional
AWB7125
14 GND
13 GND
12 RFOUT
11 Vcc2
10 GND
9 GND
C7
1000 pF
C8 C9*
0.1µF 10 µF
8 GND
RFOUT
C10*
Vcc2
C12*
100 µF 100 µF
Figure 3: Application Circuit Schematic
5
PRELIMINARY DATA SHEET - Rev 1.1
01/2013

5 Page










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