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Número de pieza | PE43502 | |
Descripción | RF Digital Attenuator | |
Fabricantes | Peregrine Semiconductor | |
Logotipo | ||
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No Preview Available ! Product Description
The PE43502 is a HaRP™-enhanced, high linearity, 5-bit RF
Digital Step Attenuator (DSA). This highly versatile DSA
covers a 15.5 dB attenuation range in 0.5 dB steps. The
Peregrine 50Ω RF DSA provides multiple CMOS control
interfaces. It maintains high attenuation accuracy over
frequency and temperature and exhibits very low insertion loss
and low power consumption. Performance does not change
with VDD due to on-board regulator. This next generation
Peregrine DSA is available in a 4x4 mm 24-lead QFN footprint.
The PE43502 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Figure 1. Package Photo
24-lead 4x4x0.85 mm QFN Package
Product Specification
PE43502
50 Ω RF Digital Attenuator
5-bit, 15.5 dB, 9 kHz - 6 GHz
Features
• HaRP™-enhanced UltraCMOS™ device
• Attenuation: 0.5 dB steps to 15.5-dB
• High Linearity: Typical +58 dBm IP3
• Excellent low-frequency performance
• 3.3 V or 5.0 V Power Supply Voltage
• Fast switch settling time
• Programming Modes:
• Direct Parallel
• Latched Parallel
• Serial
• High-attenuation state @ power-up (PUP)
• CMOS Compatible
• No DC blocking capacitors required
• Packaged in a 24-lead 4x4x0.85 mm QFN
Figure 2. Functional Schematic Diagram
RF Input
Switched Attenuator Array
Parallel Control 5
Serial In
CLK
LE
Control Logic Interface
P/S
Document No. 70-0247-06 │ www.psemi.com
RF Output
©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 11
1 page PE43502
Product Specification
Table 5. Control Voltage
State
Bias Condition
Low 0 to +1.0 Vdc at 2 µA (typ)
High
+2.6 to +5 Vdc at 10 µA (typ)
Table 6. Latch and Clock Specifications
Latch Enable
X
↑
Shift Clock
↑
X
Function
Shift Register Clocked
Contents of shift register
transferred to attenuator core
Table 7. Parallel Truth Table
Parallel Control Setting
D5 D4 D3 D2 D1
LLLLL
LLLLH
LL LHL
LLHL L
LHLL L
HL L L L
HHHHH
Attenuation Setting
RF1-RF2
Reference I.L.
0.5 dB
1 dB
2 dB
4 dB
8 dB
15.5 dB
Table 8. Attenuation Word Truth Table
Attenuation Word
Attenuation
D7
D6
D5
D4
D3
D2
D1
D0
(LSB)
Setting
RF1-RF2
LL L L L L L
L Reference I.L.
LLLLLLH L
0.5 dB
LLLL LHL
L
1 dB
LL L L HL L
L
2 dB
LLLHLLL
L
4 dB
LLHL LLL
L L HHHHH
L
L
8 dB
15.5 dB
Table 9. Serial Register Map
MSB (last in)
LSB (first in)
Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
D7 D6 D5 D4 D3 D2 D1 D0
Attenuation Word
Bits must be set to logic low
Attenuation Word is derived directly from the attenuation value. For example, to program the 12.5 dB state:
Attenuation Word: Multiply by 4 and convert to binary → 4 * 12.5 dB → 50 → 00110010
Serial Input: 00110010
Document No. 70-0247-06 │ www.psemi.com
©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 11
5 Page PE43502
Product Specification
Sales Offices
The Americas
Peregrine Semiconductor Corporation
9380 Carroll Park Drive
San Diego, CA 92121
Tel: 858-731-9400
Fax: 858-731-9499
Europe
Peregrine Semiconductor Europe
Bâtiment Maine
13-15 rue des Quatre Vents
F-92380 Garches, France
Tel: +33-1-4741-9173
Fax : +33-1-4741-9173
High-Reliability and Defense Products
Americas
San Diego, CA, USA
Phone: 858-731-9475
Fax: 848-731-9499
Europe/Asia-Pacific
Aix-En-Provence Cedex 3, France
Phone: +33-4-4239-3361
Fax: +33-4-4239-7227
Peregrine Semiconductor, Asia Pacific (APAC)
Shanghai, 200040, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
Peregrine Semiconductor, Korea
#B-2607, Kolon Tripolis, 210
Geumgok-dong, Bundang-gu, Seongnam-si
Gyeonggi-do, 463-943 South Korea
Tel: +82-31-728-3939
Fax: +82-31-728-3940
Peregrine Semiconductor K.K., Japan
Teikoku Hotel Tower 10B-6
1-1-1 Uchisaiwai-cho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a CNF
(Customer Notification Form).
Document No. 70-0247-06 │ www.psemi.com
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks
of Peregrine Semiconductor Corp.
©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 11 of 11
11 Page |
Páginas | Total 11 Páginas | |
PDF Descargar | [ Datasheet PE43502.PDF ] |
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