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Número de pieza | STL7LN80K5 | |
Descripción | N-channel Power MOSFET | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
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No Preview Available ! STL7LN80K5
N-channel 800 V, 0.95 Ω typ., 5 A MDmesh™ K5
Power MOSFET in a PowerFLAT™ 5x6 VHV package
Datasheet - production data
1
2
3
4
PowerFLAT™ 5x6 VHV
Figure 1: Internal schematic diagram
D(5, 6, 7, 8)
8 76 5
G(4)
S(1, 2, 3)
12 34
Top View
Features
Order code
STL7LN80K5
VDS
800 V
RDS(on) max.
1.15 Ω
ID
5A
Industry’s lowest RDS(on) x area
Industry’s best figure of merit (FoM)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
This very high voltage N-channel Power
MOSFET is designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
Order code
STL7LN80K5
Marking
7LN80K5
Table 1: Device summary
Package
PowerFLAT™ 5x6 VHV
Packing
Tape and reel
January 2016
DocID028831 Rev 2
This is information on a product in full production.
1/16
www.st.com
1 page STL7LN80K5
Symbol
Parameter
Table 8: Source drain diode
Test conditions
Electrical characteristics
Min. Typ. Max. Unit
ISD
ISDM(1)
VSD (2)
trr
Qrr
IRRM
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery
charge
Reverse recovery
current
ISD= 5 A, VGS = 0 V
ISD = 5 A, di/dt = 100 A/µs,
VDD = 60 V (see Figure 16: "Test
circuit for inductive load switching
and diode recovery times")
- 5A
- 20 A
- 1.6 V
- 276
ns
- 2.13
µC
- 15.4
A
trr Reverse recovery time ISD = 5 A, di/dt = 100 A/µs,
Qrr
Reverse recovery
charge
VDD = 60 V, Tj = 150 °C
(see Figure 16: "Test circuit for
IRRM
Reverse recovery
current
inductive load switching and diode
recovery times")
- 402
- 2.79
- 13.9
ns
µC
A
Notes:
(1)Pulse width is limited by safe operating area
(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Symbol
V(BR)GSO
Table 9: Gate-source Zener diode
Parameter
Test conditions
Gate-source breakdown voltage IGS = ±1 mA, ID = 0 A
Min. Typ. Max. Unit
30 -
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection,thus eliminating the need for additional external componentry.
DocID028831 Rev 2
5/16
5 Page STL7LN80K5
Dim.
A
A1
A2
b
D
E
D2
E2
e
L
K
Package information
Table 10: PowerFLAT™ 5x6 VHV package mechanical data
mm
Min.
Typ.
Max.
0.80 1.00
0.02 0.05
0.25
0.30
0.50
5.00 5.20
5.95 6.15
5.40
6.35
4.30 4.40
2.40 2.50
1.27
4.50
2.60
0.50 0.55
0.60
2.60 2.70
2.80
DocID028831 Rev 2
11/16
11 Page |
Páginas | Total 16 Páginas | |
PDF Descargar | [ Datasheet STL7LN80K5.PDF ] |
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