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PDF EP932M Data sheet ( Hoja de datos )
| Número de pieza | EP932M | |
| Descripción | Low Power DVI/HDMI Transmitter | |
| Fabricantes | Explore | |
| Logotipo |  |
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User Guide — EP932M_UG V0.1
Low Power DVI/HDMI Transmitter
EP932M
User Guide
V0.1
Revised: May 21, 2009
Original Release Date: May 20, 2009
Explore
Explore reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Explore
does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license
under its patent rights nor the rights of others. Explore products are not designed, intended, or authorized for use as components in systems
intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the Explore product could create a situation where personal injury or death may occur. Should Buyer purchase or use Explore
products for any such unintended or unauthorized application, Buyer shall indemnify and hold Explore and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges
that Explore was negligent regarding the design or manufacture of the part.
Explore Microelectronics Confidential Proprietary
NON-DISCLOSURE AGREEMENT REQUIRED
1
1 page  
Section 2 Overview
2.1 Block Diagram
Figure 2-1 Block Diagram
IDCK
DE
HSYNC
VSYNC
D[23:0]
PLL
Video Processing
SPDIF
IIS_WS
IIS_SCK
IIS_SD0
INTb
EXT_RSTb
SDA
SCL
Audio Processing
Registers
&
Logics
IIC Slave
User Guide — EP932M_UG V0.1
EXT_SWING
TX0+/TX0-
TX1+/TX1-
TX2+/TX2-
TXC+/TXC-
HTPLG
Explore Microelectronics Confidential Proprietary
NON-DISCLOSURE AGREEMENT REQUIRED
5
5 Page 
User Guide — EP932M_UG V0.1
THIDF
TSIDR
THIDR
TSID
THID
TDDF
TDDR
THDE
TLDE
TSTEP
Data, DE VSYNC, HSYNC Hold Time to IDCK falling
edge
Data, DE VSYNC, HSYNC Setup Time to IDCK rising
edge1
Data, DE VSYNC, HSYNC Hold Time to IDCK rising
edge1
Data, DE VSYNC, HSYNC Setup Time to IDCK
falling/rising edge1
Data, DE VSYNC, HSYNC Hold Time to IDCK
falling/rising edge1
VSYNC, HSYNC delay from DE falling edge1
VSYNC, HSYNC delay from DE rising edge1
DE High Time1
DE Low Time1,4
De-skew step size increment
SLHT Differential Swing Low-to-High Transition Time
SHLT Differential Swing High-to-Low Transition Time
Single Edge (DSEL=0,
DKEN=0, EDGE=0)
Single Edge (DSEL=0,
DKEN=0, EDGE=1)
Single Edge (DSEL=0,
DKEN=0, EDGE=1)
Dual Edge (DSEL=1,
DKEN=0, EDGE=0)
Dual Edge (DSEL=1,
DKEN=0, EDGE=0)
Vertical Blanking Only
Vertical Blanking Only
DKEN = 1
CLOAD = 5pF,
RLOAD = 50 ohm,
REXT_SWING = 510 ohm
CLOAD = 5pF,
RLOAD = 50 ohm,
REXT_SWING = 510 ohm
0.9
1.0
0.9
0.6
1.3
1TCIP
1TCIP
8191TCIP
128TCIP
260
170 200
230
170 200
230
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
ps
Explore Microelectronics Confidential Proprietary
NON-DISCLOSURE AGREEMENT REQUIRED
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EP932M.PDF ] | |
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