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PDF PGA2310PA Data sheet ( Hoja de datos )

Número de pieza PGA2310PA
Descripción Stereo Audio Volume Control
Fabricantes Burr-Brown Corporation 
Logotipo Burr-Brown Corporation Logotipo



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No Preview Available ! PGA2310PA Hoja de datos, Descripción, Manual

PGA2310
SBOS207B − OCTOBER 2001 − REVISED JUNE 2004
Stereo Audio Volume Control
FEATURES
D DIGITALLY-CONTROLLED ANALOG VOLUME
CONTROL:
Two Independent Audio Channels
Serial Control Interface
Zero Crossing Detection
Mute Function
D WIDE GAIN AND ATTENUATION RANGE:
+31.5dB to −95.5dB with 0.5dB Steps
D LOW NOISE AND DISTORTION:
120dB Dynamic Range
0.0004% THD+N at 1kHz
D LOW INTERCHANNEL CROSSTALK:
−126dBFS
D NOISE-FREE LEVEL TRANSITIONS
D POWER SUPPLIES: +15V Analog, +5V Digital
D AVAILABLE IN DIP−16 AND SOL−16
PACKAGES
D PIN AND SOFTWARE COMPATIBLE WITH
THE PGA2311 AND CIRRUS LOGIC CS3310E
APPLICATIONS
D AUDIO AMPLIFIERS
D MIXING CONSOLES
D MULTI-TRACK RECORDERS
D BROADCAST STUDIO EQUIPMENT
D MUSICAL INSTRUMENTS
D EFFECTS PROCESSORS
D A/V RECEIVERS
D CAR AUDIO SYSTEMS
DESCRIPTION
The PGA2310 is a high-performance, stereo audio volume
control designed for professional and high-end consumer
audio systems. The ability to operate from ±15V analog
power supplies enables the PGA2310 to process input
signals with large voltage swings, thereby preserving the
dynamic range available in the overall signal path. Using
high performance operational amplifier stages internal to
the PGA2310 yields low noise and distortion, while
providing the capability to drive 600loads directly
without buffering. The three-wire serial control interface
allows for connection to a wide variety of host controllers,
in addition to support for daisy-chaining of multiple
PGA2310 devices.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2001 − 2004, Texas Instruments Incorporated
www.ti.com

1 page




PGA2310PA pdf
www.ti.com
PGA2310
SBOS207B − OCTOBER 2001 − REVISED JUNE 2004
TYPICAL CHARACTERISTICS
At TA = +25°C, VA+ = +15V, VA− = −15V, VD+ = +5V, RL = 100k, CL = 20pF, BW measure = 10Hz to 20kHz, unless otherwise noted.
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
10
FREQUENCY RESPONSE
100 1k 10k
Frequency (Hz)
1
0.1
0.01
0.001
200k
0.0001
100m
THD+N vs AMPLITUDE
1
Amplitude (VRMS)
9
0.05
0.01
THD+N vs FREQUENCY
(VIN = 3.0VRMS, Load = 100k)
0.05
0.01
THD+N vs FREQUENCY
(VIN = 3.0VRMS, Load = 600)
0.001
0.001
0.0001
20
100 1k
Frequency (Hz)
10k 20k
0.0001
20
100 1k
Frequency (Hz)
10k 20k
0.05
0.01
THD+N vs FREQUENCY
(VIN = 8.5VRMS, Load = 100k)
0.05
0.01
THD+N vs FREQUENCY
(VIN = 8.5VRMS, Load = 600)
0.001
0.001
0.0001
20
100 1k
Frequency (Hz)
10k 20k
0.0001
20
100 1k
Frequency (Hz)
10k 20k
5

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PGA2310PA arduino
www.ti.com
MUTE FUNCTION
The PGA2310 includes a mute function. This function may
be activated by either the MUTE input (pin 8), or by setting
the gain byte value for one or both channels to 00HEX. The
MUTE pin may be used to mute both channels, while the
gain setting may be used to selectively mute the left and
right channels. Muting is accomplished by switching the
input multiplexer to analog ground (AGNDR or AGNDL)
with zero crossing enabled.
The MUTE pin is active low. When MUTE is low, each
channel will be muted following the next zero crossing
event or timeout that occurs on that channel. If MUTE
becomes active while CS is also active, the mute will take
effect once the CS pin goes high. When the MUTE pin is
high, the PGA2310 operates normally, with the mute
function disabled.
PGA2310
SBOS207B − OCTOBER 2001 − REVISED JUNE 2004
APPLICATIONS INFORMATION
This section includes additional information that is
pertinent to designing the PGA2310 into an end
application.
RECOMMENDED CONNECTION DIAGRAM
Figure 5 depicts the recommended connections for the
PGA2310. Power-supply bypass capacitors should be
placed as close to the PGA2310 package as physically
possible.
+5V Digital
ZCEN
CS
SDI
Controller
SCLK
MUTE
1
2
3
4
C1 C2
5
SDO
6
7
8
PGA2310
16
15
14
13
12
11
10
9
VINL
VOUTL
C3 C4
15V Analog
+15V Analog
C5 C6
VOUTR
VINR
To
Additional
PGA2310s
DGND
AGND
C2, C3, C5 = 0.1µF ceramic or metal film.
C1, C4, C6 = 10µF tantalum or aluminum electrolytic.
Figure 5. Recommended Connection Diagram
11

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