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PDF NM27LV010 Data sheet ( Hoja de datos )

Número de pieza NM27LV010
Descripción 1 /048 /576-Bit (128k x 8) Low Voltage EPROM
Fabricantes Fairchild 
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NM27LV010
1,048,576-Bit (128k x 8) Low Voltage EPROM
July 1998
General Description
The NM27LV010 is a high performance Low Voltage Electrically
Programmable Read Only Memory. It is manufactured using
Fairchild’s AMG™ EPROM technology. This technology allows
the part to operate at speeds as fast as 200 ns.
This Low Voltage and Low Power EPROM is designed with power
sensitive hand held and portable battery products in mind. This
allows for code storage of firmware for applications like notebook
computers, palm top computers, cellular phones, and HDD.
Small outline packages are just as critical to portable applications
as Low Voltage and Low Power.
The NM27LV010 is one member of Fairchild’s growing Low
Voltage product Family.
Features
s 3.0V to 3.6V operation
s 200 ns access time
s Low current operation
— 8 mA ICC active current @ 5 MHz (typ.)
— 20µA ICC standby current @ 5 MHz (typ.)
s Ultra low power operation
— 66 µW standby power @ 3.3V
— 50 mW active power @ 3.3V
s Surface mount package options|
— 32-pin TSOP
— 32-pin PLCC
Block Diagram
Vcc
GND
Vpp
OE
PGM
CE
A0 - A16
Address
Inputs
Output Enable,
Chip Enable &
Program Logic
Y
Decoder
X
Decoder
Data Outputs O0 - O7
Output
Buffers
1,048,576-Bit
Cell Matrix
AMG™ is a trademark of WSI, Incorporated.
© 1998 Fairchild Semiconductor Corporation
1
DS011377-1
www.fairchildsemi.com

1 page




NM27LV010 pdf
Programming Characteristics (Note 11), (Note 12), (Note 13) and (Note 14)
Symbol
tAS
tOES
tCES
tDS
tVPS
tVCS
tAH
tDH
tDF
tPW
tOE
IPP
ICC
TA
VCC
VPP
tFR
VIL
VIH
tIN
tOUT
Parameter
Conditions
Address Setup Time
OE Setup Time
CE Setup Time
Data Setup Time
VPP Setup Time
VCC Setup Time
Address Hold Time
Data Hold Time
Output Enable to Output
Float Delay
CE/PGM = VIL
Program Pulse Width
Data Valid from OE
VPP Supply Current
during Programming Pulse
CE/PGM = VIL
CE/PGM = VIL
VCC Supply Current
Temperature Ambient
Power Supply Voltage
Programming Supply Voltage
Input Rise, Fall Time
Input Low Voltage
Input High Voltage
Input Timing Reference Voltage
Output Timing Reference Voltage
Min
1
1
1
1
1
1
0
1
0
45
Typ
50
20 25
6.25 6.5
12.5 12.75
5
0.0
2.4 4.0
0.8
0.8
Programming Waveform (Note 13)
Addresses
2.0V
0.8V
Data
2.0V
0.8V
6.25V
VCC
VPP 12.75V
Program
Address N
t AS
Data In Stable
ADD N
t DS t DH
Hi-Z
t VCS
t VPS
CE t CES
Program Verify
t AH
Data Out Valid
ADD N
t DF
Max
60
105
100
20
20
30
6.75
13.0
0.45
2.0
2.0
Units
µs
µs
µs
µs
µs
µs
µs
µs
ns
µs
ns
mA
mA
°C
V
V
ns
V
V
V
V
PGM 2.0V
0.8V
tOES
tOE
OE 2.0V
0.8V
t PW
DS011377-4
Note 11: Fairchild’s standard product warranty applies to devices programmed to specifications described herein.
Note 12: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. The EPROM must not be inserted into or removedfrom a board with
voltage applied to VPP or VCC.
Note 13: The maximum absolute allowable voltage which may be applied to the VPP pin during programming is 14V. Care must be taken when switching the VPP supply to
prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1 µF capacitor is required across VPP, VCC to GND to suppress spurious voltage transients
which may damage the device.
Note 14: During power up the PGM pin must be brought high (VIH) either coincident with or before power is applied to VPP.
5 www.fairchildsemi.com

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