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Número de pieza | AK4642EN | |
Descripción | Stereo CODEC | |
Fabricantes | Asahi Kasei Microsystems | |
Logotipo | ||
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= Preliminary =
AK4642EN
Stereo CODEC with MIC/HP/SPK-AMP
GENERAL DESCRIPTION
The AK4642 features a stereo CODEC with a built-in Microphone-Amplifier, Headphone-Amplifier and
Speaker-Amplifier. Input circuits include a Microphone-Amplifier and an ALC (Auto Level Control) circuit
that is suitable for portable application with recording/playback function. The AK4642 is available in a
32pin QFN, utilizing less board space than competitive offerings.
FEATURES
1. Recording Function
Stereo Mic Input (Full-differential or Single-ended)
Stereo Line Input
MIC Amplifier (+32dB/+26dB/+20dB or 0dB)
Digital ALC (Automatic Level Control)
(+36dB 54dB, 0.375dB Step, Mute)
ADC Performance: S/(N+D): 83dB, DR, S/N: 86dB (MIC-Amp=+20dB)
S/(N+D): 88dB, DR, S/N: 95dB (MIC-Amp=0dB)
Wind-noise Reduction Filter
Stereo Separation Emphasis
2. Playback Function
Digital De-emphasis Filter (tc=50/15s, fs=32kHz, 44.1kHz, 48kHz)
Digital Volume (+12dB 115.0dB, 0.5dB Step, Mute)
Digital ALC (Automatic Level Control)
(+36dB 54dB, 0.375dB Step, Mute)
Stereo Separation Emphasis
Stereo Line Output
- Performance: S/(N+D): 88dB, S/N: 92dB
Stereo Headphone-Amp
- S/(N+D): 70dB, S/N: 90dB
- Output Power: 62mW@16 (HVDD=3.3V)
- Pop Noise Free at Power ON/OFF
Mono Speaker-Amp
- S/(N+D): 50dB@240mW, S/N: 90dB
- BTL Output
- Availbable for both Dynamic and Piezo Speaker
- Output Power: 400mW@8 (HVDD=3.3V)
3.0Vrms@50 (HVDD=5V)
Analog Mixing: Mono Input
3. Power Management
4. Master Clock:
(1) PLL Mode
Frequencies:
11.2896MHz, 12MHz, 12.288MHz, 13.5MHz, 24MHz, 27MHz (MCKI pin)
1fs (LRCK pin)
32fs or 64fs (BICK pin)
(2) External Clock Mode
Frequencies: 256fs, 512fs or 1024fs (MCKI pin)
5. Output Master Clock Frequencies: 32fs/64fs/128fs/256fs
MS0420-E-01
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2014/09
1 page ■ Comparison with AK4631
Function
Mic Input
Stereo Mic Input
ADC
MIC ALC
Wind-noise Reduction Filter
Stereo Separation Emphasis
ALC for Playback
Soft Mute
Bass Boost
De-emphasis
DAC
HP-Amp
Line Output
Line Output Level
P I/F
MCKI Pull-down
Analog Loopback
DSP Mode
Package
Regester Map
AK4631
Single-ended
N/A
Mono
+27.5dB to –8dB, 0.5dB step
N/A
N/A
SP only, +18dB to –8dB
N/A
N/A
N/A
Mono
N/A
Mono
1.98Vpp
3-wire
Available
Available
Available
28pin QFN (5.2mm x 5.2mm)
[AK4642EN]
AK4642EN
Single-ended / Full-differential
Available
Stereo
+36dB to –54dB, 0.375dB step, Mute
Available
Available
Line/HP/SP, +36dB to –54dB
Available
Available
Available
Stereo
Available
Stereo
1.98Vpp/2.50Vpp
3-wire/I2C
N/A
N/A
N/A
32pin QFN (5mm x 5mm)
Upper-compatible (Difference: ALC
parameter, Analog Loopback & DSP
Mode Removed)
MS0420-E-01
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2014/09
5 Page [AK4642EN]
Parameter
min typ max Unit
DAC Characteristics:
Resolution
- - 16 Bits
Stereo Line Output Characteristics: DAC LOUT, ROUT pins, ALC=OFF, IVOL=0dB, DVOL=0dB, LOVL bit =
“0”, RL=10k
Output Voltage (Note 17)
LOVL bit = “0”
1.78
1.98
2.18 Vpp
LOVL bit = “1”
2.25
2.50
2.75 Vpp
S/(N+D) (3dBFS)
78 88
- dBFS
S/N (A-weighted)
82 92
- dB
Interchannel Isolation
80 100
- dB
Interchannel Gain Mismatch
- 0.1 0.5 dB
Load Resistance
10 -
- k
Load Capacitance
- - 30 pF
Headphone-Amp Characteristics: DAC HPL/HPR pins, ALC=OFF, IVOL=0dB, DVOL=0dB
Output Voltage (Note 18)
HPG bit = “0”, 0dBFS, HVDD=3.3V, RL=22.8
HPG bit = “1”, 0dBFS, HVDD=5V, RL=100
HPG bit = “1”, 0dBFS, HVDD=3.3V, RL=16 (Po=62mW)
1.58
2.40
-
1.98
3.00
1.00
2.38 Vpp
3.60 Vpp
- Vrms
S/(N+D)
HPG bit = “0”, 3dBFS, HVDD=3.3V, RL=22.8
HPG bit = “1”, 3dBFS, HVDD=5V, RL=100
HPG bit = “1”, 0dBFS, HVDD=3.3V, RL=16 (Po=62mW)
60
-
-
70
80
20
- dBFS
- dBFS
- dBFS
S/N (A-weighted)
(Note 19)
(Note 20)
80
-
90
90
- dB
- dB
Interchannel Isolation
(Note 19)
(Note 20)
65
-
75
80
- dB
- dB
Interchannel Gain Mismatch
(Note 19)
(Note 20)
-
-
0.1 0.8 dB
0.1 0.8 dB
Load Resistance
16 -
-
Load Capacitance
C1 in Figure 2
C2 in Figure 2
-
-
- 30 pF
- 300 pF
Note 17. Output voltage is proportional to AVDD voltage. Vout = 0.6 x AVDD (typ)@LOVL bit = “0”.
Note 18. Output voltage is proportional to AVDD voltage.
Vout = 0.6 x AVDD(typ)@HPG bit = “0”, 0.91 x AVDD(typ)@HPG bit = “1”.
Note 19. HPG bit = “0”, HVDD=3.3V, RL=22.8.
Note 20. HPG bit = “1”, HVDD=5V, RL=100.
HP-Amp
HPL/HPR pin
Measurement Point
47F
6.8
C1 0.22F
10
C2 16
Figure 2. Headphone-Amp output circuit
MS0420-E-01
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2014/09
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet AK4642EN.PDF ] |
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